- Meta (Austin, TX)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers... and UVM methodology. 9. 3+ years experience in IP/sub- system and/or SoC level verification based on… more
- Meta (Austin, TX)
- …"Apply to Job" online on this web page. **Required Skills:** ASIC, Design Verification Engineer Responsibilities: 1. Develop functional tests based on ... of experience involving each of the following: 7. 1. System Verilog/UVM methodology or C/C++ based verification ...1. System Verilog/UVM methodology or C/C++ based verification 8. 2. Track record of 'first-pass success' in… more
- Qualcomm (Austin, TX)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... work on a selected part of the CPU Design Verification to ensure that it functions to the standards...and SOC Architects to understand the concepts and high-level system requirements. + Develop detailed Test and Coverage plans… more
- SpaceX (Bastrop, TX)
- Sr. Design Verification Engineer (Silicon Engineering) Bastrop, TX Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... with the ultimate goal of enabling human life on Mars. SR. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- NVIDIA (Austin, TX)
- …The NVIDIA System -On-Chip (SOC) group is looking for a top Senior ASIC Verification Engineer ! In this position you will have the chance to create a ... for verification methodologies and implementation that enable high quality system -level IP design and robust verification at multiple environment levels… more
- NVIDIA (Austin, TX)
- The NVIDIA System -On-Chip (SOC) group is looking for a top ASIC Verification Engineer interested in innovative approaches to drive design quality in our IP. ... experience) with 5+ years of experience + Experience in pre-silicon verification (UVM, SystemVerilog), System -On-Chip design/implementation flow, and design… more
- BAE Systems (Austin, TX)
- …may be available based on position level and/or job specifics. **Senior Design Verification Engineer - FPGA** **110463BR** EEO Career Site Equal Opportunity ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...your career. BAE is looking for experienced FPGA Design Verification Engineers who can develop and use verification… more
- BAE Systems (Austin, TX)
- …incentives may be available based on position level and/or job specifics. **Design Verification Engineer - FPGA - (Sign-on Bonus)** **110460BR** EEO Career Site ... **Job Description** Picture yourself developing advanced electronic systems deployed to protect members of our armed...BAE is looking for experienced senior level FPGA Design Verification Engineers who can plan, architect, and develop … more
- IBM (Austin, TX)
- …heart of IBM, where growth and innovation thrive. **Your role and responsibilities** As a System verification engineer you will play a crucial role in ... and system We are looking for a System verification engineer to be...contribute to the design, implementation, and optimization of these systems , including processor, memory, and I/O subsystems. You will… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part ... solutions for Facebook's data center applications. You will be responsible for the verification closure of a design module or sub- system from test-planning, UVM… more
- Meta (Austin, TX)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Formal ... Verification to build IP and System On...Chip (SoC) for data center applications. As a Formal Verification Engineer , you will be part of… more
- Meta (Austin, TX)
- …(SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat and ... field, or equivalent practical experience. 9. 5+ years of experience in static verification tools 10. Experience with Lint, Clock Domain & Reset Domain crossing. 11.… more
- Qualcomm (Austin, TX)
- …smarter, connected future for all. The team is responsible for the complete verification lifecycle, from system -level concept to tape out and post-silicon ... The responsibility of the position involves comprehensive pre-silicon test planning for system interop verification which includes peripheral IP's such as CXL… more
- Qualcomm (Austin, TX)
- …smarter, connected future for all. The team is responsible for the complete verification lifecycle, from system -level concept to tape out and post-silicon ... digital power IP's, its testbench development using the advanced verification methodology such as SystemVerilog-UVM, coverage development, assertion model… more
- Qualcomm (Austin, TX)
- …of GPU hardware, drivers, features, applications, and tools. + Creates and maintains verification test benches and environments in System Verilog/UVM + Create ... experience. **PREFERRED QUALIFICATIONS:** + 5+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience + Verification … more
- Amazon (Austin, TX)
- …Work with the design and communication systems team and participate in system level verification using test benches constructed using UVM, SystemC and DPI-C ... related field, or equivalent experience - 2+ years in verification preferably in communication systems - 1+...systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab… more