• CPU Power Analysis

    Qualcomm (Santa Clara, CA)
    …Engineering Group, Engineering Group > CPU Engineering **General Summary:** + Drive Power analysis and Projections on a project involved in the development ... of CPUSS with emphasis in power analysis . + Define CPU rail planning and PMIC inductor sizing working closely with SoC and Board teams + Work with CPU ,… more
    Qualcomm (07/16/25)
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  • Lead CPU Performance Analysis

    Qualcomm (Santa Clara, CA)
    …**Job Area:** Engineering Group, Engineering Group > SoC Architecture **General Summary:** As a Lead CPU Performance Analysis Engineer, you will be working ... on CPU performance analysis and tuning, microbenchmark development, workload characterization, workload tracing, and performing competitive performance … more
    Qualcomm (06/21/25)
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  • CPU Physical Design - Low Power

    Qualcomm (Santa Clara, CA)
    …CLP and FV signoff from synthesis to PNR exit. + Signoff knowledge is mandatory (STA, Power analysis ,FV, low power verification, PV,etc) + Quick learner with ... a smarter, connected future for all. As a Qualcomm CPU Engineer, you will lead innovative Central...verification, STA, Physical design, etc. + Knowledge of low power flow ( power gating, multi-Vt flow, … more
    Qualcomm (06/05/25)
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  • Lead CPU Performance Architect,…

    Google (Mountain View, CA)
    …hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Lead CPU Performance Architect in architecture and performance, you ... design. + Experience in CPU architecture with CPU blocks. + Experience in performance modeling, analysis...both architecture and performance angles. + Define and write CPU subsystem architecture specifications. + Lead the… more
    Google (06/21/25)
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  • CPU Architecture Lead

    Google (Mountain View, CA)
    …of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Lead CPU Architect in architecture and performance, you will be ... analysis , correlation, and workload characterization. + Experience in CPU architecture with CPU blocks, and with...microarchitecture concepts. + Collaborate with design teams in Performance, Power , Area (PPA) tradeoff analysis for new… more
    Google (06/21/25)
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  • Senior CPU Architecture and Performance…

    Google (Mountain View, CA)
    …performance and design. + Experience in high-performance CPU architecture and CPU blocks. + Experience in performance modeling, analysis , correlation, and ... leadership, you will be planning a project and guiding CPU architects and working with engineers in power...both architecture and performance angles. + Define and write CPU subsystem architecture specifications. + Lead the… more
    Google (06/26/25)
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  • CPU Floorplan and Integration Engineer, San…

    Qualcomm (Santa Clara, CA)
    …Minimum Requirements + Proficiency in synthesis, place and route, and signoff timing/ power analysis . + Expertise in block-level implementation as well as ... physical design teams to design, floorplan and integrate the CPU designs meeting aggressive power , area and...is strongly preferred. + Experience as a key technical lead driving development and delivery of physical design databases… more
    Qualcomm (06/05/25)
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  • Senior Silicon Power Performance Engineer

    NVIDIA (Santa Clara, CA)
    …(SSG) is where innovation meets impact. Our mission is to craft outstanding GPU CPU and SoC products that power Artificial Intelligence, Gaming, Virtual Reality, ... and SOC products. In this position, you will: + Lead multi-functional teams to validate implement silicon power... and optimization. + Exposure to digital design, circuit analysis , CPU /GPU/SOC architecture, PTPX, process technologies and… more
    NVIDIA (06/13/25)
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  • Failure Analysis Technical Lead

    Cisco (San Jose, CA)
    Failure Analysis Technical Lead Apply (https://jobs.cisco.com/jobs/Login?projectId=1439161) + Location:San Jose, California, US + Area of InterestSupply Chain + ... learning information quickly and uses resources to research and resolve issues. + Failure Analysis Technical Lead will drive the improvements in the accuracy of… more
    Cisco (07/23/25)
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  • Power Design Engineer

    Celestica (San Jose, CA)
    …optical, switch, memory, NPU, CPU , GPU components + Failure mode analysis + Good understanding of power efficiency optimization schemes + Experience ... with design, software/firmware, mechanical and thermal engineers. You will lead the design of DC-DC switch-mode power ...power delivery system architecture and specifications. + Design, analysis , and simulation of high current and low noise… more
    Celestica (05/28/25)
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  • Lead NoC Performance Architect

    Qualcomm (Santa Clara, CA)
    …MS/PhD in Computer Science/Computer Engineering/Electrical Engineer with 10+ years of experience in CPU / SoC performance/ power modeling, analysis / debug + ... NoC Performance Architect, you will create NoC performance and power models for a wide range of SoCs spanning...C++ and Perl / Python + Ability to independently lead and mentor a team of junior performance architects… more
    Qualcomm (05/20/25)
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  • Manufacturing Test Lead

    Microsoft Corporation (Mountain View, CA)
    …will manage and optimize the Cloud infrastructure. We are looking for a Manufacturing Test Lead to join our team. Join us in this exciting AI revolution. Be part of ... to fuel this world changing mission. **Responsibilities** + Define and lead end-to-end manufacturing test strategies for PCBAs, storage enclosures, and rack-level… more
    Microsoft Corporation (07/23/25)
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  • Lead Application Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …Static Timing Analysis ) + Debug and resolve complicated PPA, Low Power implementation and TAT issues. + Exceptional troubleshooting and analytical skills + ... an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE...(LEC), Design-for-Test (DFT), Place & Route and Static Timing Analysis (STA).You may get involved in design services projects… more
    Cadence Design Systems, Inc. (07/18/25)
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  • Senior Hardware Validation Engineer

    NVIDIA (Santa Clara, CA)
    …experience + Strong understanding of digital design, circuit design and analysis , computer architecture and CPU /GPU architecture. + Validation experience ... can be. We are looking for a Senior Hardware Validation Engineer to lead validation activities in the Datacenter Systems Engineering team. You'll work closely with… more
    NVIDIA (06/18/25)
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  • Lead Speed and Reliability Engineer - DFP

    NVIDIA (Santa Clara, CA)
    …stand out from the crowd: + Familiarity with statistical methods and tools for data analysis + Background with substrate and power supply noise analysis and ... DFP team is looking for a Speed and Reliability Lead . You will be leading and crafting testability features...test chips) fabricated using innovative processes for speed, performance, power , yield and quality. + Provide guidance to silicon… more
    NVIDIA (05/29/25)
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  • Senior Hardware Engineer, NPD Hardware

    Amazon (Cupertino, CA)
    …We support all AWS data centers and all of the servers, storage, networking, power , and cooling equipment that ensure our customers have continual access to the ... in the areas of terabit switch fabrics, 10/40/100 gigabit interfaces, embedded CPU subsystems, and network processors. Previous experience in defining and designing… more
    Amazon (07/23/25)
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  • Hardware Validation Engineer

    NVIDIA (Santa Clara, CA)
    …a clear understanding of how hardware integrates with firmware and software stacks + Lead hands-on debugging and root cause analysis across hardware and firmware ... rapid issue resolution and product quality improvements. + Hands-on experience in system-level power management validation for CPU and GPU products The base… more
    NVIDIA (07/18/25)
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  • Principal Program Manager

    Microsoft Corporation (Mountain View, CA)
    …Drive and facilitate the execution of the programs from concept to tape out, power -on to launch, and connecting all the dependencies and moving parts together + ... Apply your One Microsoft mentality to collaborate with and influence + Build, lead , and grow diverse and inclusive teams and provide both technical and non-technical… more
    Microsoft Corporation (07/23/25)
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  • Sr Staff Engineer Hardware (Board/System Design)

    Palo Alto Networks (Santa Clara, CA)
    …tools + Experience working with lab equipment for hands-on prototyping, design, and power analysis + Collaborate closely with firmware, software, mechanical, and ... tools + Experience working with lab equipment for hands-on prototyping, design, and power analysis + Collaborate closely with firmware, software, mechanical, and… more
    Palo Alto Networks (07/05/25)
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  • Data Center Firmware Test Architect

    NVIDIA (Santa Clara, CA)
    …to track progress and drive data-driven decision-making. + Drive Root Cause Analysis and Debugging: Lead complex issue investigations that span firmware, ... and automation harnesses that support functional, integration, stress, regression, power , security, and performance testing. Ensure test infrastructure scales… more
    NVIDIA (07/12/25)
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