- Marvell Technology, Inc. (Santa Clara, CA)
- …models. In this unique role, you'll have the opportunity to work on both the physical design and methodology for future designs of our next-generation, ... server, 5G/6G, automotive, and networking applications. What You Can Expect For senior engineering candidates seeking a challenging and impactful role, this position… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) - PPA ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …life's work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer(s) to join ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …devices for high-speed optical interconnect and sensing applications. + Developing physical design methodologies for implementation of graphics processors and ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- NVIDIA (Santa Clara, CA)
- …crossing of clock domains across hierarchical boundaries). + Collaborate with RTL, physical design , and verification teams to drive consistency and correctness ... human inventiveness and intelligence. We are seeking an innovative senior timing signoff and constraint methodology engineer...about the challenges of designing most complex deep sub-micron design (3nm and beyond) who thrives on pushing the… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- … Power Integrity Methodology Engineer. What you'll be doing: + Developing physical design methodologies for rail analysis and signoff. + Responsible for ... or related field. + Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support. + Strong understanding of all aspects of IR/EM/thermal… more
- Microsoft Corporation (Mountain View, CA)
- …that will manage and optimize the Cloud infrastructure. We are looking for a ** Senior Physical Design Engineer** to join the team. **Responsibilities** + ... -for-Test (DFT) & Functional mode Timing Analysis and convergence within the Physical Design (PD) domain. + Facilitate coordination across cross-functional… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Science/Engineering, Electrical, Engineering, or related field + 12+ years of design /EDA experience ( methodology , flow, implementation, RTL2 GDS) + Proven ... most advanced companies in the world. Through Cadence's Electronic Design Automation (EDA) products, we've worked with a wide...and Signoff to meet/exceed their PPA targets, achieve faster design closure, and turn their design concepts… more
- NVIDIA (Santa Clara, CA)
- …timing paths through ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing, cell sizing, buffering, ... + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS (or equivalent experience) in… more
- Cisco (San Jose, CA)
- …+ Develop and analyze functional coverage. + Help define, evolve, and support our design methodology . + Collaborate with the verification team to address ... Senior ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1431806)...and close code coverage. + Work closely with the physical design team to close design… more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer. In this highly ... and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis ... as part of the advanced technology team to optimize design tradeoffs and methodology on next generation...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- Microsoft Corporation (San Jose, CA)
- …turning ideas into production systems at a rapid pace. Join us as a Senior Hardware Engineer to build the world's fastest public cloud and make a difference ... to millions of people across the planet. As a Senior Verification Engineer in the Accelnet Hardware team, you...functional scenarios in discussions with the software and hardware design teams. * Execute the test plan by adding… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... Senior DFx/RTL Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1447271) + Location:San Jose,...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Microsoft Corporation (Santa Clara, CA)
- …modules for ASIC memory subsystem. + Review and provide feedback on verification plans and methodology . + Collaborate with Physical design teams to ensure ... Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer. You will join our front-end silicon...equivalent experience. + 5+ years of experience with RTL design and/or architecture experience. + 5+ years of experience… more
- Celestica (San Jose, CA)
- …& Lean; Working Effectively with Others; D/PFMEA; 8D/Corrective Action; Equipment Safety; Design of Experiments (DOE). ** Physical Demands** + Duties of this ... City: San Jose **General Overview** **Functional Area:** Engineering **Career Stream:** Design - Software Engineering **SAP Short Name:** SLE-ENG-DSE **Job Level:**… more
