- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and validation of ... and on-chip interconnects Design and contribute to design for test ( DFT ) methodologies Basic Qualifications: BS, MS in Electrical Engineering, Computer Engineering… more
- Meta (Sunnyvale, CA)
- … DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer , DFT Responsibilities: 1. Develop and implement DFT ... **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- SpaceX (Sunnyvale, CA)
- ASIC /SOC DFT Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... this possible, with the ultimate goal of enabling human life on Mars. ASIC /SOC DFT ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience… more
- Broadcom (San Jose, CA)
- …have a Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking ... would be required to work on various phases of SoC DFT related activities for Broadcom APD ( ASIC Products Division)'s designs - DFT Architecture, Test… more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** Broadcom is looking for highly qualified DFT engineer . In this role you will be contributing to the ... Electrical Engineering or Computer Engineering with 6+ years of experience in ASIC DFT development for serial high-speed data center networking. + Experience as… more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...CMOS analog circuit and physical design + Knowledge of DFT /Scan/MBIST/LBIST and understanding of their impact on physical design… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you ... intelligence. What You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL...power/area optimization across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... BS (or equivalent experience) in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD)...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT ,… more
- RTX Corporation (El Segundo, CA)
- …Product Enabling Technologies team. **What You Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL, timing closure, ... tools and practices for continuous improvement in the group's ASIC / FPGA design flow + Contribute to engineering...validation with advanced lab equipment + Design for Test ( DFT ) and manufacturability issues + Experience with Unix, scripting,… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ... integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/ DFT signal routing - As a key member of...signal routing - As a key member of the ASIC design team, you will implement and deliver high… more
- Broadcom (San Jose, CA)
- …challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from ... of experience developing, implementing, and testing high performance communications/networking ASIC products. Experience in mapping communications algorithms or standards… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing team. If you ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced ... lint and work w/ designers to create waivers. 6. Perform RTL DFT analysis and improve DFT coverage for stuck-at faults. 7. Perform flat and hierarchical clock… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... be doing: + Support the deployment of advanced Design-For-Test ( DFT ) and Automatic Test Pattern Generation (ATPG) solutions +...to stand out from the crowd: + Knowledge of DFT including fault models, ATPG, fault simulation, and diagnosis… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for an outstanding ASIC engineer to join the team. The Team is responsible for crafting all aspects ... to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved in end-to-end cycle of... teams. + Get involved in end-to-end cycle of ASIC execution starting from micro-arch, design implementation, design fixes,… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most… more
