- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ... **Summary:** Meta is hiring ASIC Methodology Engineers within our Infrastructure organization to work on design integrity and signoff methodology … more
- Amazon (Sunnyvale, CA)
- …Amazon Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design ... flows that improve the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design… more
- Qualcomm (San Diego, CA)
- …Engineering Group, Engineering Group > ASICS Engineering **General Summary:** As a Timing Engineer , you will play a vital role in Timing analysis targeting the ... and Tempus. + You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in...contribution for STA timing sign off. + A timing Engineer should be able to understand all kind of… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... performance and efficiency. + Understand the design and implementation, develop methodology and infrastructure to drive Performance, Power and Area (PPA)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's.… more
- Qualcomm (San Diego, CA)
- …largest fabless semiconductor company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and a focus on low ... power, high performance ASIC designs, and, ability to execute critical power analysis...performance, low power Memory Subsystem RTL Design, flows and methodology for high performance ASICs in sub-4nm process for… more
- Qualcomm (San Diego, CA)
- …Controller and Advanced Memory NoCs based Subsystem Design Team is looking for ASIC Design Engineers for the next generation high speed LPDDR/DDR memory subsystems.. ... the rest of the system such as CPU, GPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT… more
- Qualcomm (San Diego, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...joining Meta. 7. 3+ years hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 9. 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 10. 10+ years experience… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking best-in-class ASIC Verification Engineer to verify the world's leading GPUs. In this role, you will be doing unit level verification of the ... across many NVIDIA teams from software, to architecture, design, methodology , and more. The GPU is used in applications...Strong communication and problem solving skills + Exposure to ASIC design, ASIC verification and computer architecture,… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
- Palo Alto Networks (Santa Clara, CA)
- …create an environment where we all win with precision. **Your Career** Join our ASIC team and help deliver the digital logic that powers our next-generation firewall ... platforms. As a Senior Principal Engineer , you will take end-to-end ownership of complex modules...members. This role requires a deep technical background in ASIC design for networking applications and the ability to… more
- Qualcomm (San Diego, CA)
- …smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design, optimize, verify, and test electronic systems, ... meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate the concepts of… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...the various partition blocks. 8. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis,… more
- NVIDIA (Santa Clara, CA)
- …experience) + 5+ years of verification experience + Exposure to Computer Architecture, ASIC design and verification methodology is required + Strong ability with ... NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world's leading...across many NVIDIA teams from software, to architecture, design, methodology , and more. The GPU is used in applications… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....data-path intensive designs 23. Experience in the 3D-IC technology, methodology , and advanced packaging 24. Experience in validating Power… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... and contribute to defining, evolving, and supporting our prototyping methodology . + **Option to engage in block-level RTL design...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...for Timing, Area, Power. 6. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC,). 7.… more