- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...14. 5+ Years of experience as a Front End Synthesis & Integration Engineer 15. Experience with… more
- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...10. 10+ Years of experience as a Front End Synthesis & Integration Engineer 11. Experience with… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future ... Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...signoff checks + Full chip and block level front-end implementation from timing constraints development, synthesis , formal… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...16. Experience with SOC Design Integration & Front End Implementation 17. Experience with Front End Synthesis … more
- SpaceX (Irvine, CA)
- SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where ... on Mars. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're...on physical design and timing closure + Familiar with ASIC synthesis and physical design flows and… more
- Amazon (Sunnyvale, CA)
- …Engineering or related field, or equivalent experience. * 7+ years of experience in ASIC implementation , ie, synthesis , STA and working with P&R for ... set up the flow for both logic and physical synthesis flow for various technology nodes. * Work with.../ Communications Engineering. * 10+ years of experience in ASIC implementation . * Experience in leading physical… more
- Meta (Sunnyvale, CA)
- …this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization ... and corresponding reset sequence for RDC. 10. Develop timing constraints for RTL- synthesis and PrimeTime-STA for blocks and top-level including SOC. 11. Analyze… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg … more
- SpaceX (Irvine, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine,...Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was.../timing clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis ,… more
- Palo Alto Networks (Santa Clara, CA)
- …to create an environment where we all win with precision. **Your Career** As a Design engineer on the ASIC team, you will create complex digital logic for our ... area, timing, power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis ...of PCIe or Ethernet standards + Experience with hardware implementation of Search Algorithms + Formal property verification +… more
- Qualcomm (San Diego, CA)
- …designs. + Strong knowledge in the entire low power, high performance ASIC /SoC design flows (micro-architecture, RTL design, verification, synthesis , timing/STA, ... company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and...PX (PTPX) and work with cross-functional teams - design, implementation , and physical design teams - to optimize power.… more
- Qualcomm (San Diego, CA)
- …performance, and area of the IPs - Assist in running the full suite of front-end ASIC design tools (lint checking, CDC, DFT, synthesis , FV, STA, etc.) - Develop ... Qualcomm mixed-signal IP design team is seeking talented senior ASIC digital designers to join our efforts in developing...- Work with physical design (PD) team for physical implementation of the IPs - Work with design verification… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis , static timing analysis. You will either be responsible for block and/or chip level design and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis, ECO, and post silicon debug. + Strong interpersonal skills… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...using Verilog, System Verilog and HLS 4. Lint, CDC, Synthesis , & Power Optimization 5. Soft and hard IP… more
- Google (Sunnyvale, CA)
- …Verilog/SystemVerilog. + Experience with industry-standard EDA tools for simulation, synthesis , and power analysis. Preferred qualifications: + Master's degree or ... related field. + 5 years of experience in Application-specific integrated circuit ( ASIC ) design. + Experience working on interconnects and network subsystems. Be… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is seeking an ASIC Engineer , Design to join our Infrastructure organization to build cutting edge ASICs in fields such as machine learning, and ... expert engineers to build "Green" data center accelerators. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Work on Micro-architecture… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... design team, you will be responsible for the micro-architecture and design implementation of Tegra SOC memory subsystem modules. You will collaborate with… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation , and timing closure by understanding arch/logic as… more