- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...and the top-level including SOC. 2. Analyze the inter-block timing and come up with IO budgets for the… more
- SpaceX (Irvine, CA)
- Sr. SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future ... goal of enabling human life on Mars. SR. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- SpaceX (Irvine, CA)
- SOC/ ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future ... goal of enabling human life on Mars. SOC/ ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our… more
- Google (San Diego, CA)
- …with high complexity silicon in state-of-the-art technology process nodes. + Experience with ASIC design flows and methodology of static timing analysis. + ... experience. + 5 years of technical experience in silicon timing closure and chip integration. + Experience with STA...and their tradeoffs. + Drive clock tree planning and implementation for SoCs to achieve best energy, performance and… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If ... timing and power convergence, as well as ECO implementation + Apply knowledge and experience to improve ...implementation + Apply knowledge and experience to improve timing convergence flows working with the methodology teams. What… more
- NVIDIA (Santa Clara, CA)
- …for all aspects of timing including setting up timing constraints, timing analysis and closure, ECO implementation , and timing methodologies. + ... MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience...Timing + Hands-on experience in STA tools, ECO implementation , and timing closure of high-speed designs.… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our...optimization techniques and generate optimized Gate Level Netlist for Timing , Area, Power. 2. Debug the timing /area/congestion… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...optimization techniques and generate optimized Gate Level Netlist for Timing , Area, Power. 2. Debug the timing /area/congestion… more
- Broadcom (San Jose, CA)
- …major segments of the Semiconductor industry, including AI. Be part of the Design Implementation team within Broadcom ASIC Products Division where we create CMOS ... concept through product release. Become a member of an ASIC design team responsible for all aspects of physical...- Floor planning chips and blocks - Routing - Timing , both mission mode and test modes - Integration… more
- Amazon (Sunnyvale, CA)
- …Engineering or related field, or equivalent experience. * 7+ years of experience in ASIC implementation , ie, synthesis, STA and working with P&R for deep ... and DFT teams to understand the design and create timing constraints. * Check the RTL design for clean.../ Communications Engineering. * 10+ years of experience in ASIC implementation . * Experience in leading physical… more
- The Boeing Company (Huntington Beach, CA)
- …Missiles & Weapons; Strike, Surveillance and Mobility; and Autonomous Systems). As an ASIC /FPGA Engineer on the Boeing Electronic Products team you will develop ... of ASIC /FPGA design or verification experience + Experience with ASIC /FPGA architectural definition, and detailed design implementation and functional… more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis ... optimization techniques and generate optimized gate level netlist for Timing , Area, and Power. 2. Debug timing /area/congestion...for Timing , Area, and Power. 2. Debug timing /area/congestion issues and resolve w/ RTL & physical designers.… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...Develop/improve physical design methodologies and automation scripts for various implementation steps + Closely collaborate with the ASIC… more
- SpaceX (Irvine, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine,...Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was... clean design + Participate in all phases of ASIC and/or FPGA design flow (eg synthesis, timing… more
- Palo Alto Networks (Santa Clara, CA)
- …to create an environment where we all win with precision. **Your Career** As a Design engineer on the ASIC team, you will create complex digital logic for our ... goals for area, timing , power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize floorplan + Analyze and… more
- Qualcomm (San Diego, CA)
- … ASIC /SoC design flows (micro-architecture, RTL design, verification, synthesis, timing /STA, UPF, CLP, LEC formal verification, DFT, physical design.) + Hands-on ... company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical skills, and...PX (PTPX) and work with cross-functional teams - design, implementation , and physical design teams - to optimize power.… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- Google (Sunnyvale, CA)
- …related field. + 5 years of experience in Application-specific integrated circuit ( ASIC ) design. + Experience working on interconnects and network subsystems. Be ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing ASIC… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA, you'll join a group of ... you will be responsible for the micro-architecture and design implementation of Tegra SOC memory subsystem modules. You will...a plus. + Experience with all stages in the ASIC design flow including emulation, prototyping, DFT, timing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to ... design team, you will be responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on… more