- Cisco (San Jose, CA)
- …most complex ASICs being developed in the industry. Your Impact You'll be joining our Physical Design team at Cisco Silicon One group, which is responsible for ... or equivalent similar experience. * 10+ years of experience in Physical Design . * Experience working on Fullchip activities. * Experience with RTL2GDSII… more
- The Boeing Company (Huntington Beach, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... Boeing Space, Intelligence & Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers (Lead, Senior or… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...refining design and timing constraints for seamless physical design closure. As part of this… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities: 1. Develop and own … more
- Palo Alto Networks (Santa Clara, CA)
- …meet aggressive goals for area, timing, power, and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize ... military experience required + Minimum 8 years experience in ASIC design + Demonstrated success in taking...+ Debugging simulation, emulation, and silicon validation + Analyzing physical design reports and fixing timing and… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a Technical Program Manager with ASIC design and development experience. This Technical Program Manager (TPM) will lead ... technical details to big picture 12. Experience in managing ASIC design flow (architecture, micro-architecture, RTL, Synthesis, functional verification, … more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...refining design and timing constraints for seamless physical design closure. As part of this… more
- SanDisk (Milpitas, CA)
- …seamless integration of ASIC designs into larger systems + Conduct thorough design reviews and provide technical leadership to junior engineers + Analyze and ... development + Contribute to the development of best practices and methodologies for ASIC design within the organization + Optimize designs for power efficiency,… more
- Qualcomm (San Diego, CA)
- …cases using PowerArtist and PrimeTime PX (PTPX) and work with cross-functional teams - design , implementation, and physical design teams - to optimize power. ... company in the world. Qualcomm is looking for bright ASIC engineers with excellent analytical and technical ...verification, synthesis, timing/STA, UPF, CLP, LEC formal verification, DFT, physical design .) + Hands-on experience in writing… more
- Cisco (San Jose, CA)
- …Do Be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL Design . * Create micro-architecture ... bugs and close code coverage. * Work closely with physical design team to close design...work with SDK and Software teams as part of ASIC development to create a seamless handshake between hardware… more
- SanDisk (Irvine, CA)
- …We are looking for a **PCIe expert** with a strong background in ** ASIC and Firmware development** to help define, architect, and deliver the next generation ... drive (SSD) products. In this high-impact role, you will drive the design of advanced SSD subsystems, write detailed specifications, and lead debug efforts… more
- Cisco (San Jose, CA)
- …focus on Design -for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT requirements ... be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose,...participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...in Electrical Engineering or Computer Engineering - Previous relevant technical internship experience - Experience with FinFET design… more
- Meta (Sunnyvale, CA)
- …Engineers in supporting them with the handoff tasks. 11. Interact with Physical Design Engineers and provide them with timing/congestion feedback. **Minimum ... in SOC Design Integration and Front-End Implementation. 21. Knowledge of Physical Design flow such as Floorplanning, CTS, Routing 22. Good Understanding… more
- Cisco (San Jose, CA)
- …You will be part of the development organization as an ASIC Engineering Technical Leader with primary focus on RTL Design . Key responsibilities: * Create ... address design bugs and close code coverage. * Work closely with physical design team to close design timing and place-and-route issues * Triage, debug,… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... in SOC Design Integration and Front-End Implementation. 18. Knowledge of Physical Design flow such as Floorplanning, CTS, Routing 19. Good Understanding… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. 8. Interact with Physical Design Engineers and provide them with timing feedback. **Minimum ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....DFT Modes. 4. Perform STA for full chip and Physical partition blocks using PrimeTime 5. Run Logic/ Physical… more
- Amazon (San Diego, CA)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... semiconductor projects. This is an opportunity to shape the technical direction of critical IC design workflows...infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's… more
- Cisco (San Jose, CA)
- …lead in San Jose, CA. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT ... hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and...programming/scripting languages (Perl, Python, C++) - Solid understanding of ASIC physical design , and methodologies… more