• Senior Custom SOC IP

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a Senior Custom SOC IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...success in ASIC Development + Experience owning processing ASIC, IP or SoC design verification more
    NVIDIA (06/27/25)
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  • Custom SOC IP

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a Senior Custom SOC / IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC more
    NVIDIA (06/27/25)
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  • Custom SOC IP

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking a Senior Custom SOC / IP Verification Engineer to verify the next generation SoC and IP solutions! We are looking for special ... we will build the next generation of life changing custom SOCs! If you are a motivated individual that...What you'll be doing: + Responsible for ASIC design verification for various processing blocks within a SOC more
    NVIDIA (06/27/25)
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  • Sr SOC Verification Engineer,…

    Amazon (Cupertino, CA)
    …- Experience verifying multiple levels of design including: custom blocks, IP blocks, sub-systems, and fullchip SOC system testing. - Experience using ... customers across all industries. We are seeking experienced Design Verification Engineers to build the next generation of our...in our data centers. Key job responsibilities - verify custom chip designs at the SOC level… more
    Amazon (06/11/25)
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  • ASIC Engineer, Design Verification

    Meta (Sunnyvale, CA)
    …high-speed protocols like PCIe/Ethernet/DDR, computer architecture and NOC. 4. Define and implement IP / SoC verification plans, build verification test ... benches to enable IP /sub-system/ SoC level verification . 5. Develop functional tests based on verification test plan. 6. Drive Design Verification to… more
    Meta (07/11/25)
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  • Design Verification Engineer - Machine…

    Meta (Sunnyvale, CA)
    …methodology and C/C++ based verification 10. 8+ years of experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based ... pre- and post-Silicon product lifecycle 6. Support hand-off and integration of developed subsystems/ IP blocks into larger SOC environments 7. Develop and drive… more
    Meta (06/25/25)
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  • Design Verification Engineer

    Meta (Sunnyvale, CA)
    …C/C++ based verification and UVM methodology 10. 2+ years experience in IP /sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based ... to implement the testing infrastructure to validate new core IP or System on Chip ( SoC ) implementations....verification plans for each of the different core IP 2. Define and track detailed test plans for… more
    Meta (06/25/25)
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  • Custom IP Design Engineer

    Qualcomm (San Diego, CA)
    …flow. This position involves the design and development of best-in-class custom digital IP from RTL to GDS for optimizing SoC Power, Performance and Area ... technologies. To support its growing needs, we have a Custom Solutions Team for design and development (RTL to...(RTL to GDS) of various highspeed and low power IP 's (mini-macros) which are used across different sub-systems in… more
    Qualcomm (06/27/25)
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  • DFD (Design for Debug) RTL Execution Lead

    Microsoft Corporation (Mountain View, CA)
    …CDC, Low Power intent and more. + Delight your customers by delivering cutting-edge debug IP 's & infrastructure for custom SoC designs that can perform ... 7+ years of experience in Computer Architecture, Digital Design, CPU/ SoC design and verification principles as part...and verification principles as part of CPU, SoC and/or IP development. **Other Qualifications:** +… more
    Microsoft Corporation (07/16/25)
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  • Senior SoC Design Engineer

    NVIDIA (Santa Clara, CA)
    …and other spaces. + Work closely with architects, chip leads, and customers on SoC IP design, timing closure, power analysis, methodology alignment, and program ... digital blocks. + Experience in negotiating solutions across design, verification , PD, and IP teams. + Experience...Strong interpersonal, communication, and teamwork skills. Come join our custom SOC design team working on innovative… more
    NVIDIA (07/15/25)
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  • SOC Physical Design Engineer, Hardware…

    Amazon (Sunnyvale, CA)
    …and route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification , and ECO - 7+ years integrating IP and ability ... Description The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the...level. - Drive block physical implementation through synthesis, formal verification , floor planning, bus / pin planning, place and… more
    Amazon (07/03/25)
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  • Silicon Verification Manager - AI…

    Meta (Sunnyvale, CA)
    …skills/knowledge to drive strategy, planning and prioritization for testing infrastructure, verification and validation of machine learning Hardware IP . You ... SW-HW verification methodologies and strategies for Machine learning accelerator IP 3. Define and track project milestones and detailed plans for module-… more
    Meta (05/08/25)
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  • Chiplet Lead, Silicon

    Google (Mountain View, CA)
    …Development. + Experience in custom circuit design and simulation of Analog Mixed-Signal IP . + Experience with SERDES IP integration such as PCIe, USB, D2D ... UCIe into SoC from feature definition to full design implementation. Preferred...team on Post-Silicon debug, leading to seamless execution from IP sourcing, integration to final post-Silicon verification .… more
    Google (06/06/25)
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  • Sr. CPU Architect, Project Kuiper

    Amazon (San Diego, CA)
    …you will: - Work closely with the system architects to define and architect world-class SoC and IP blocks, which meet power, area and performance targets. - ... speed SERDES, Ethernet, DRAM interface, compute cores, interconnects, complex custom IPs with focus on performance, power and area....Define compute architecture for wireless protocol stack and packet processing. - Develop performance model… more
    Amazon (04/24/25)
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  • CPU Floorplan and Integration Engineer, San Diego

    Qualcomm (Santa Clara, CA)
    …and power grid planning. + Skilled in physical design, integration, and verification of large processor and system-on-chip ( SoC ) designs. + Extensive ... chip-level place and route, and finalize the CPU database for construction and verification . + Coordinate custom layout integration. + Collaborate with external… more
    Qualcomm (06/05/25)
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  • Digital Design Engineer

    Meta (San Diego, CA)
    …or block level uArchitecture definition and design of Computer Vision/Image Sensing IP . 2. Contribute to chip-level integration, verification plan development ... also support the Digital Silicon Architects developing and implementing the next generation custom and semi- custom mixed signal ICs to drive our industry leading… more
    Meta (06/13/25)
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  • Memory Designer

    Qualcomm (San Diego, CA)
    …verifications + Layout planning and supervision + Interacting with CAD team for full verification and model generation + Interacting with SoC teams (CPU, GPU, ... memory circuits and architectures. As part of the Memory IP team, you will take innovative and revolutionary ideas...or related field and 4+ years of ASIC design, verification , validation, integration, or related work experience. OR Master's… more
    Qualcomm (05/29/25)
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  • RTL Design Engineer

    Qualcomm (San Diego, CA)
    …with the most advanced technologies. To support its growing needs, we have a Custom Solutions Team for design and development (RTL to GDS ) of various highspeed ... and low power IP 's (mini-macros) which are used across different sub-systems in SoC . In this position, you will be an integral part of CST team with the… more
    Qualcomm (06/24/25)
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  • Physical Design Lead Engineer

    Cisco (San Jose, CA)
    …to resolve PV issues and address to proper owners. + Deploy and improve physical verification flows and methodologies. Develop custom check as per need for ... Leader, you will be responsible for overseeing the design and verification of application-specific integrated circuits (ASICs), ensuring they meet performance,… more
    Cisco (06/25/25)
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  • Memory Designer

    Qualcomm (San Diego, CA)
    …verifications + Layout planning and supervision + Interacting with CAD team for full verification and model generation + Interacting with SoC teams (CPU, GPU, ... memory circuits and architectures. As part of the Memory IP team, you will take innovative and revolutionary ideas...responsibilities will include (but not limited to): + Develop custom digital circuits for high-speed and low-power SRAM designs.… more
    Qualcomm (07/16/25)
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