• DFT Manager

    Broadcom (San Jose, CA)
    …before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for a DFT Manager position at our San Jose Design Center. As a ... DFT Manager , you will lead a group of highly performing DFT Engineers working on delivering high quality custom silicon products to our customers. The… more
    Broadcom (03/20/25)
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  • Sr. Technical Program Manager , Advanced…

    Amazon (Sunnyvale, CA)
    Description As a Senior Technical Program Manager , in Amazon's Advanced Products Operations group, you will engage with an experienced cross-disciplinary staff to ... and quality to Amazon's customers. Key job responsibilities As a Technical Program Manager , you will be responsible for bringing new products from engineering to… more
    Amazon (04/26/25)
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  • Manager , Digital Design - Mixed-Signal…

    NVIDIA (Santa Clara, CA)
    Are you looking for a Digital Design Manager role? As a Senior Digital Design Manager in our Mixed-Signal High-Speed I/O SerDes group, you'll lead a team working ... and random testing methodologies + Lead front-end design flows (Lint/CDC/Synthesis/ DFT /LEC/STA) and coordinate with back-end teams for successful chip tape-outs… more
    NVIDIA (03/12/25)
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  • Senior Physical Design CAD Manager

    Google (Mountain View, CA)
    …with advanced nodes (eg, 3nm, 2nm). + Familiarity with design for testability ( DFT ) methodologies. + Knowledge of low-power design techniques. Be part of a team ... We are seeking a highly experienced and motivated Senior Physical Design CAD Manager to lead our physical design team and drive the development of advanced… more
    Google (04/22/25)
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  • Sr. Manager - Silicon Test Engineering,…

    Amazon (San Diego, CA)
    …Experience with JTAG and boundary-scan techniques. - Understand of and experience with DFT and DFM. - Experience with ATE hardware development and debugging. - ... Experience with running firmware on DUTs to reduce test time and increase self-testability. - Knowledge of PCB design requirements and layout best practices for high-speed signaling and mm-wave signaling. - Experience writing test programs for UltraFlex and… more
    Amazon (04/18/25)
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  • ASIC Engineering Technical Leader - SDC

    Cisco (San Jose, CA)
    …Responsibilities include: * Oversee fullchip SDCs and work with the Physical Design and DFT teams to close fullchip timing in multiple timing modes. * Assist with ... * Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence). * Experience… more
    Cisco (05/10/25)
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  • ASIC Design Technical Leader - Design & Timing…

    Cisco (San Jose, CA)
    …member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. * Option to also do ... * Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence) * Experience… more
    Cisco (05/02/25)
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  • ASIC Design Engineer - Design & Timing Constraints

    Cisco (San Jose, CA)
    …member of design team who oversees fullchip SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing modes. * Option to also do ... * Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence) * Experience… more
    Cisco (04/19/25)
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  • PCB Design Engineer

    Snap Inc. (Palo Alto, CA)
    …assembly drawings. + Define design rules, apply them to the constraint manager , design within limits, create artworks, fabrication and assembly documentation, and ... Design for Manufacturability (DFM), Design for Assembly (DFA), and Design for Testability ( DFT ) + Knowledge of PCB design standards for common interfaces in consumer… more
    Snap Inc. (03/08/25)
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