- Siemens (Fremont, CA)
- …competent leadership from our managers and executives. This Applications Engineer (AE) position delivers technical expertise for Functional Verification ... the sales and support of a wide range to Functional Verification technologies for our leading edge...Skills Preferred (but not required): + Prior 5-10 years Applications Engineering experience is a plus + Knowledgeable in… more
- Siemens (Fremont, CA)
- …EDA could be the place for you! Job Description: This Applications Engineer (AE) position delivers technical expertise for Functional Verification of ... interested in working across a range of areas from application engineering support and management, verification and...the sales and support of a wide range to Functional Verification technologies for our leading edge… more
- Siemens (Fremont, CA)
- …10+ years of experience in semiconductor design, verification , and formal verification . EDA Functional Verification experience desired Travel will be ... design. Position Overview: The Product focused AE for Formal Verification will drive and grow Formal Verification ...200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we… more
- Meta (Menlo Park, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications . As a Design Verification Engineer , you will be part of an agile ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....one or more of the following areas along with functional verification -SV Assertions, Formal, Emulation 12. Experience… more
- Meta (Menlo Park, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a agile ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation… more
- Meta (Menlo Park, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a team ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....on developing cutting-edge ASIC solutions for Meta's data center applications . You will be responsible for the verification… more
- Meta (Sunnyvale, CA)
- …ISA, and application level 20. Experience with Design verification /validation of machine learning applications and accelerators **Public Compensation:** ... through algorithms to architecture, transistors to firmware.As a Design Verification Engineer at Meta's Reality Labs, you...one or more of the following areas along with functional verification - SystemVerilog Assertions, Formal, Emulation… more
- Northrop Grumman (San Diego, CA)
- …history, they're making history. Explore a career engineering what's possible as a Digital Verification Engineer in San Diego, CA. **What You'll Get to Do:** Our ... the beach Southern California is famous. As a Digital Verification Engineer at Northrop Grumman, you will...Digital design (Memories, bus standards, microprocessors) + Experience with functional verification methodology for the full life… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with an ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation… more
- Qualcomm (San Diego, CA)
- …that meet performance, security, technology, and feature requirements. As a Design Verification Engineer , you will work with Chip Architects to validate ... smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer , you will plan, design,...as Stimulus, Checkers, Monitors Assertions, and Coverpoints. + Develop Verification Plans and Testbenches for your functional … more
- Qualcomm (San Diego, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art tools, ... setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be...and analyze System Verilog assertions and coverage (code, toggle, functional ). + **Collaborate with Teams:** Work closely with architects,… more
- Qualcomm (San Diego, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art tools, ... setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be...and analyze System Verilog assertions and coverage (code, toggle, functional ). + Collaborate with Teams: Work closely with architects,… more
- Meta (Sacramento, CA)
- …in Formal Verification to build IP and System On Chip (SoC) for data center applications . As a Formal Verification Engineer , you will be part of a team ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....in Formal Verification 11. Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop,… more
- Qualcomm (San Diego, CA)
- …based verification skills & experience with assertion & coverage-based verification methodology + Good understanding of chip-level functional model building ... federal, local, and foreign governments. In this role as a Hardware Engineer , you will support government-sponsored research, development, integration and test of… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... components such as Stimulus, Checkers, Assertions, Trackers, and Coverage. + Develop Verification Plans and Testbenches for your functional domain. + Execute… more
- SpaceX (Irvine, CA)
- Design Verification Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars ... possible, with the ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- Amazon (Sunnyvale, CA)
- Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining verification environments and test suites for FPGA based subsystems. ... groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and...(Synopsys, Vivado, Quartus) * Experience monitoring and optimizing design verification coverage wrt to line, FSM, functional ,… more
- Northrop Grumman (San Diego, CA)
- …history, they're making history. Explore a career engineering what's possible as a Digital Verification Engineer in San Diego, CA. **What You'll Get to Do:** Our ... the beach Southern California is famous. As a Digital Verification Engineer at Northrop Grumman, you will...Digital design (Memories, bus standards, microprocessors) + Experience with functional verification methodology for the full life… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and drive next ... plans, build verification test benches to enable IP/sub-system/SoC level verification . 5. Develop functional tests based on verification test… more
- Meta (Sunnyvale, CA)
- …click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/IP/SoC ... plans, build verification test benches to enable block/IP/sub-system/SoC level verification . 2. Develop functional tests based on verification test… more