• Heterogeneous Integration

    Qualcomm (San Diego, CA)
    …+ Experience with 2.5D and 3D STCO and pathfinding + Familiarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside ... help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate,… more
    Qualcomm (06/06/25)
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  • Process Engineer Sr . Director

    Applied Materials (Santa Clara, CA)
    …hardware and silicon-package development bringing products to market. Experienced in Heterogeneous Integration , Process and Design Enablement + Strong knowledge ... and experience in Advanced Packaging 2.5D/3D/Fan-out/EMIB/SIP processes, design trade-offs and qualification. + Strong Knowledge in Technology and Supply Chain, Design for Reliability. + Experience/Exposure to board assembly process is a plus + Vendor and… more
    Applied Materials (05/15/25)
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  • CXR Senior Process and Integration

    Stanford University (Stanford, CA)
    CXR Senior Process and Integration Engineer **School of Engineering, Stanford, California, United States** Research Post Date Mar 10, 2025 Requisition # ... **CXR** business unit, providing CMOS+X prototyping and development services for the heterogeneous integration of commercial foundry devices ( **C** MOS) with… more
    Stanford University (06/10/25)
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  • Principal Engineer Microelectronic…

    Northrop Grumman (Manhattan Beach, CA)
    …technology development in semiconductor materials, processes, devices, and 3D heterogeneous integration (3DHI). SPF's discriminating technological capabilities ... test engineers. This requisition may be filled as a **Principal Microelectronics Layout Engineer ** or ** Senior Principal Microelectronics Layout Engineer ** .… more
    Northrop Grumman (05/31/25)
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  • Senior Cyber DEV.OPS Engineer

    SAIC (CA)
    …and leverage your leadership abilities. SAIC is seeking a Cyber Security Software Integration Engineer to support a fast paced highly innovative SDA project ... gap between high-level security requirements and policies and ensure their integration into information technology component products and information systems through… more
    SAIC (06/13/25)
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  • Senior Applied AI Software Engineer

    NVIDIA (Santa Clara, CA)
    …engineers enthusiastic about building the next generation of scalable AI systems. As a Senior Applied AI Software Engineer on the Dynamo project, you will ... Innovate in the management and transfer of large KV caches across heterogeneous memory and storage hierarchies, using the NVIDIA Optimized Transfer Library (NIXL)… more
    NVIDIA (06/11/25)
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  • Senior Analog, Custom IC Design/Layout…

    Cadence Design Systems, Inc. (San Jose, CA)
    …+ Helping customers adopt and proliferate our systems solutions including heterogeneous integration and electromagnetic and thermal analysis Skills needed ... for this role: + Minimum 3 years of practical hands-on experience in simulation and/or layout applications for Custom IC Design. Analog, mixed-signal or RF design or layout experience. + Strong problem-solving, communication, organizational, planning, and… more
    Cadence Design Systems, Inc. (04/12/25)
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