- Qualcomm (San Diego, CA)
- …understand the HW u-architecture of the infrastructure components involved, the memory system and interconnect, identify performance bottlenecks; define ... and design of Platform infrastructure HW components such as Memory controllers, System cache, System ...Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.… more
- Amazon (Cupertino, CA)
- …- Have familiarity with accelerator design, interconnects, DMAs, Memory sub - systems , CPU cores, SIMDs, debug and system level architectures - Have a ... and Japan, and customers across all industries. Custom SoCs ( System on Chip) live at the heart of AWS...rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies… more
- Qualcomm (San Diego, CA)
- …Engineer, you will work with Chip Architects to validate the concepts of core and sub - system level micro-architectures. You will work on a selected part of the ... you will plan, design, optimize, verify, and test electronic systems , validate digital/analog designs and develop a comprehensive validation/verification testbench… more
- Meta (Sunnyvale, CA)
- …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in- system testing and prototyping. The goal is ... our front-end and back-end digital design efforts at the IP and sub - system levels. From microarchitecture definition and RTL implementation to synthesis… more
- Google (San Diego, CA)
- …use cases and applications, and how they relate to specific hardware blocks or sub - systems . You will represent the direction of the software team, their asking ... with computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems. + 5 years of software development experience in… more
- Amazon (San Diego, CA)
- …7+ experience in performance architecture across CPUs, interconnect, high speed network I/O, and memory systems in SoCs with emphasis on power efficiency. - Must ... or granted asylum. A day in the life Be part of Project Kuiper's sub -team responsible for defining and implementing the digital chip SOCs for communications via Low… more