- SpaceX (Sunnyvale, CA)
- Sr. SOC / ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... this possible, with the ultimate goal of enabling human life on Mars. SR. SOC / ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX we're… more
- NVIDIA (Santa Clara, CA)
- …Design Engineers to design and implement the world's leading GPU and SoC 's. With the System- ASIC team, you will contribute to designing multiple products ... NVIDIA is looking for a Senior ASIC Design Engineer to join our...of several modules. + Integrate modules into the overall SOC design and work closely with other… more
- SpaceX (Irvine, CA)
- FPGA/ ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... the ultimate goal of enabling human life on Mars. FPGA/ ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...Starlink projects, implementing complex SoC blocks and SoC integration tasks + Implement or integrate design… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers...design of an end-to-end IP or integration of ASIC / SoC design and point out ... ) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities:...design and timing closure 11. Experience with large SOC designs (>20M gates) with frequencies over 1GHZ 12.… more
- SpaceX (Irvine, CA)
- Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... ultimate goal of enabling human life on Mars. SR. ASIC DESIGN ENGINEER (SILICON ENGINEERING) At SpaceX...problems including clock domain crossings and power optimization + ASIC / SoC system integration experience + Experience with… more
- Amazon (San Diego, CA)
- …ASIC / SOC leads) to create project execution plans for ASIC / SOC development considering all criteria to design products the meet the power/performance ... looking for a Technical Program Manager with experience in ASIC / SOC development, from architecture to pre-production stages,...from architecture definition, RTL design , Verification, IP design , Physical design , silicon bring… more
- NVIDIA (Santa Clara, CA)
- …interconnect and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early ... seeking a talented ASIC Floorplan Engineer to design and implement the world's leading SoC 's...What you will be doing: + Working with architects, design leads, physical design leads… more
- SanDisk (Milpitas, CA)
- … development + Contribute to the development of best practices and methodologies for ASIC design within the organization + Optimize designs for power efficiency, ... architectures using advanced RTL techniques + Develop and optimize SoC subsystems, including CPU complex, DDR, Host, Flash, Debug,...design optimization + Proficiency in EDA tools for ASIC design and verification + Knowledge of… more
- Qualcomm (San Diego, CA)
- …low power designs. + Strong knowledge in the entire low power, high performance ASIC / SoC design flows (micro-architecture, RTL design , verification, ... PrimeTime PX (PTPX) and work with cross-functional teams - design , implementation, and physical design ...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... synthesis/timing clean design while working with the physical design team to ensure a routable...Systems design . + A deep understanding of ASIC design flow including RTL design… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... practical experience **Preferred Qualifications:** Preferred Qualifications: 16. Experience with SOC Design Integration and Front-End Implementation. 17.… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback. ... practical experience **Preferred Qualifications:** Preferred Qualifications: 17. Experience in SOC Design Integration and Front-End Implementation. 18. Knowledge… more
- Qualcomm (San Diego, CA)
- …system-level in 5nm, 4nm and beyond (process technologies). + You will be working with physical design team (and other teams) on timing closure, CAD teams, IP ... Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- SanDisk (Irvine, CA)
- …and reviewing **low-level firmware** in C/C++ and/or Python + Solid understanding of ** SoC design ** and processor architectures (eg, ARM, ARC) + Familiarity with ... for a **PCIe expert** with a strong background in ** ASIC and Firmware development** to help define, architect, and...products. In this high-impact role, you will drive the design of advanced SSD subsystems, write detailed specifications, and… more
- Qualcomm (San Diego, CA)
- …The candidate will work with frontend RTL, DFT, Synthesis, Design Verification and Physical Design teams during the SoC development. Also the candidate ... **Responsibilities/Duties:** + Work with frontend RTL, DFT, Synthesis, and Physical design teams in the development of...Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related… more
- Amazon (Cupertino, CA)
- …Develop and execute design automation mechanisms and flows. * Work with physical design teams to achieve performance and area requirements. Mentorship & ... requirements including software applications, use models, system architecture and SoC architecture/micro-architecture solutions. * Participate in logic design … more
- NVIDIA (Santa Clara, CA)
- …5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, ... next generation of high-performance IPs for CPU, GPU and SOC designs. + Owning static timing analysis and convergence...with cross-functional teams. + Strong understanding of timing and physical design fundamentals Ways to stand out… more
- Qualcomm (San Diego, CA)
- …foundational knowledge in Electronics and Electrical Engineering principles, VLSI concepts, digital/ ASIC design , and packaging including chiplets + Excellent ... Qualifications:** + Strong familiarity with Static Timing Analysis and Physical Design tools & methodology. + Solid...Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related… more
- Google (Sunnyvale, CA)
- …Computer Science, with an emphasis on computer architecture. + 10 years of experience in ASIC design with 3 years of experience working on security design . ... experiences, delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer, you will join a...to verify and debug RTL designs. + Work with physical design teams to ensure design… more
- Google (Mountain View, CA)
- …convergence, including STA and sign-off. Preferred qualifications: + Experience with ASIC design flows and methodology of Physical design . + Experience ... equivalent practical experience. + 4 years of experience in Physical Design . + Experience in one or...Performance, Area and Power. + Develop all aspects of ASIC RTL2GDS implementation for designs. + Manage physical… more