- NVIDIA (Santa Clara, CA)
- …efficiency and support + Improve the speed, flexibility and extensibility of the GPU front end build flow + Keep the GPU Continuous Integration system at ... NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position… more
- NVIDIA (Santa Clara, CA)
- …be doing: + Improve the speed, flexibility, and extensibility of the High-Speed IO front end integration, build, and verification flows + Apply best in class ... NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in...of relevant industry experience + Exposure to computer architecture, ASIC design, and verification methodology is required + Experience… more
- NVIDIA (Santa Clara, CA)
- …responsible for crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, ... today. The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is...interacts with the floor-planning and back end teams to help craft the physical floorplan of… more
- Amazon (San Diego, CA)
- …design teams using various silicon processes - Develop, regress, and deploy digital front end flows including RTL static checks and design verification ... broadband connectivity. Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing...experience - Digital design experience with Synthesis and back end hand off ownership - Digital design RTL2GDS experience… more
- SpaceX (Sunnyvale, CA)
- …make this possible, with the ultimate goal of enabling human life on Mars. SR. SOC/ ASIC SYNTHESIS & FRONT - END STA ENGINEER (SILICON ENGINEERING) At SpaceX ... meet critical deadlines, as needed COMPENSATION & BENEFITS: Pay range: Synthesis and Front - End STA Engineer/ Senior : $170,000.00 - $230,000.00/per year Your… more
- NVIDIA (Santa Clara, CA)
- …diverse team crafting NVIDIA's chip design methodology! We're responsible for NVIDIA's front - end ASIC software including RTL synthesis, equivalence checking, ... design implementation and analysis tools. + Provide support for ASIC tools and flows. What we need to see:...algorithms, data structures, testing + Familiarity with Verilog and ASIC and physical design along with experience in commercial… more
- Qualcomm (San Jose, CA)
- …validate equivalence check + Debug/resolve any DRC issues, identify solution and work with front - end team to ensure DFT DRCs are fixed. + Analyzing and meeting ... Engineering Group, Engineering Group > ASICS Engineering **General Summary:** The Digital ASIC Design Team is currently seeking candidates who will be responsible… more
- NVIDIA (Santa Clara, CA)
- …and scalable manner + Identify inefficiencies and improvement opportunities in the front - end chip implementation process and propose ideas to tackle them ... NVIDIA System-On-Chip (SOC) group is looking for a top ASIC Engineer with a curiosity about SOC design automation,...+ Own front - end design quality checks and reviews to… more
- quadric.io, Inc (Burlingame, CA)
- …Ph.D. in Electrical or Computer Engineering with a minimum of five years of CPU/GPU/ ASIC front - end design + Proficiency in SystemC, SystemVerilog, or Verilog ... floor of a revolutionary new processor architecture. As a senior member of our chip design team, you will...+ Contribute to timing closure through full product cycle ( front end , back- end , tapeout) Requirements:… more
- Microsoft Corporation (Santa Clara, CA)
- …is seeking a Senior Silicon Engineer - IO. You will join our front - end silicon team and be responsible for delivering cutting-edge, high performance, low ... all employees to positively impact our culture every day. **Responsibilities** As a Senior Silicon Engineer-IO in the Data Processing Unit team you will be… more
- Qualcomm (Santa Clara, CA)
- …design's post-layout functionality meets the intention of the netlist delivered by front - end designers * Collaboration: Working closely with cross-geo front ... degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree… more
- Integense (San Jose, CA)
- …Responsibilities + Ownership of the digital design for multiple Battery Management products, full Front End and Back End responsibility. + Collaborating with ... Micro is disrupting the semiconductor supply chain with innovative ASIC solutions. As an established provider of integrated circuit...products in reliable mass production. + Experienced in all Front and Back End activities - RTL,… more
- Integense (San Diego, CA)
- …+ Complete Ownership of the Digital Design and Verification for ATE products - full Front End and Back End responsibility + Define digital architecture and ... experience demonstrated by multiple products in mass production + Adept in front - end chip architecture and pre-silicon design flow, RTL design/coding, low… more