- Silvus Technologies (Los Angeles, CA)
- …creates a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Senior FPGA / RTL Design Engineer - Signal Processing_** who will report ... projects targeted to address challenging real-world communication needs. This **_Senior FPGA / RTL Design Engineer_** position is based at Silvus… more
- Silvus Technologies (Irvine, CA)
- …creates a pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a **_Principal FPGA / RTL Design Engineer- Signal Processing_** who will report ... Computer Science, or related fields. + Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; 8 years of experience in RTL … more
- Silvus Technologies (Irvine, CA)
- …THE OPPORTUNITY Silvus is seeking a full-time Principal FPGA / RTL Design Engineer who will report to the Senior Engineering Director for Irvine and work ... exciting projects aimed at addressing challenging real-world communication needs. The Principal FPGA / RTL Design Engineer position will be based at Silvus'… more
- Google (Goleta, CA)
- Senior FPGA Design Engineer, Quantum AI...practical experience. + 4 years of experience in Field Programmable Gate Array ( FPGA ) design ... and development. + 4 years of experience with RTL design using Verilog or systemVerilog. **Preferred...systems. You will have a deep understanding of the FPGA development cycle, from microarchitecture, RTL development,… more
- Silvus Technologies (Irvine, CA)
- …pathway to a fulfilling career._ THE OPPORTUNITY Silvus is seeking a full-time **_Senior FPGA Design Engineer_** reporting to the _Director of FPGA ... research and development process from concept to field deployment. FPGA Design Engineers are responsible for the...RTL coding, simulation, and test bench development. + FPGA synthesis and timing closure. + Hardware verification and… more
- Capgemini (San Jose, CA)
- ** Senior FPGA Engineer - Bay Area...**About the Job You're Considering** 1. Hands-on experience with ** RTL design ** and **Vivado Flow (IP Integrator)** ... **multimeter** for testing and validation. **Your Skills and Experience** 1. Proficiency in ** RTL design ** and **Vivado Flow (IP Integrator)** . 2. Solid… more
- NVIDIA (Santa Clara, CA)
- …Santa Clara, CA. What you'll be doing: + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it through synthesis and ... prototyping platforms. We are now looking for a Senior FPGA Prototyping Engineer to join our...timing and generate bit streams. + Bring up the design on FPGA prototyping platforms and indulge… more
- RTX Corporation (El Segundo, CA)
- …Will Do:** + Requirements capture, ASIC / FPGA digital architecture and design using RTL , timing closure, verification, and system integration + Recommend ... evolving global market. This position is for a motivated Senior Electrical or Computer engineering candidate to be involved...practices for continuous improvement in the group's ASIC / FPGA design flow + Contribute to engineering… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …but is not limited to: + Digital microarchitecture definition and documentation + RTL logic design , debug and functional verification + Strong background in ... and developing flows at all phases of the digital design and functional verification. It is further expected that...the San Jose office. A Cadence satellite office (if senior with extensive SerDes exp.) will be considered. Position… more
- SpaceX (Hawthorne, CA)
- …Experience working with complex digital designs + Experience in different stages of FPGA development: RTL design , verification, synthesis, timing analysis, ... for versatile, driven, and collaborative engineers. As an Sr. FPGA engineer on the satellite digital design ...+ Implement logic designs and signals processing algorithms in RTL + Integrate designs onto FPGA /SoC platforms… more
- General Atomics (Poway, CA)
- …highly experienced Signal Processing Engineer with strong capabilities in systems architecture, RTL level design , verification and validation. This position will ... The successful candidate will work with a multi-disciplinary team to design , develop, and implement data processing and signal processing algorithms. **DUTIES… more
- BrainChip, Inc. (Laguna Hills, CA)
- BrainChip is seeking a Senior Digital Design Engineer to join a team working on cutting-edge and novel AI hardware. The primary job function is to work with team ... gather the relevant information, and develop a solution. Use RTL language to design the digital functional...tools to check the functionalities of the designs in RTL and gate level. Collaborate with other… more
- Amazon (Sunnyvale, CA)
- …Edge that is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our ... and the full chip. You will participate in the design verification and bring-up of the chip and subsystems...in the lab bring-up of these blocks either in FPGA , emulation, or silicon by potentially writing test scripts,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA design * Knowledge of ... to make an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob...opportunities* Run Verilog simulations to enable IP benchmarking* Run RTL synthesis for area and timing analysis* Present IP… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …stack development for configuration, control and status monitoring. + SystemVerilog for synthesizable RTL design + C and Python for modeling, scripting, and ... an impact on the world of technology. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the development of… more
- Google (Fremont, CA)
- …lead the bring-up process on various debugging stations, including, but not limited to, Field-Programmable Gate Array ( FPGA )-based platforms. Assist in ... Senior Silicon Bringup and Test Lead, Raxium -...You will require an in-depth understanding of Register-Transfer Level ( RTL ) design , digital verification, and all aspects… more
- SpaceX (Irvine, CA)
- …extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: ASIC Design Engineer/ Senior : $160,000.00 - $220,000.00/per year Your actual level and ... Sr. ASIC Design Engineer (Silicon Engineering) Irvine, CA Apply SpaceX...requirements and system limitations + Define micro-architecture, implement the RTL in Verilog/System Verilog, integrate that in top level… more
- quadric.io, Inc (Burlingame, CA)
- …Experience in data-parallel hardware design for high-performance computing + Experience in FPGA design is a plus + Experience in logic synthesis and ... floor of a revolutionary new processor architecture. As a senior member of our chip design team,...by understanding its applications + Own microarchitecture definition & RTL implementation of the processor in SystemC or SystemVerilog… more
- SpaceX (Hawthorne, CA)
- …using the Xilinx toolchain + Experience with verification between simulation and RTL FPGA implementation + Experience modeling RF and channel impairments ... and sensing systems + Work across disciplines with RF/antenna, FPGA , and software engineers to design and...validate overall system performance, including modem performance + Support FPGA designers with bit-accurate and cycle-accurate RTL … more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem IP verification Team! At NVIDIA, we have ... computing. In this position, you will partner with the design and architecture teams to help make the right...+ Ensure code and functional coverage of all the RTL which you will verify. + Work with and… more
