• Senior SoC / RTL

    Qualcomm (San Diego, CA)
    …independently plans, performs the moderately-defined responsibility for the digital architecture, design , Verilog RTL coding, implementation, and verification of ... Also responsible for high speed digital and mixed signal board design ; including requirements gathering, schematic capture, component placement, layout review,… more
    Qualcomm (06/18/25)
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  • Sr. RTL Design Engineer, Hardware…

    Amazon (Sunnyvale, CA)
    …tablets, Fire TV and Amazon Echo. What will you help us create? The Role: As a Senior RTL Design Engineer, you will be part of an advanced architecture team ... Communicate and work with team members across multiple disciplines - Develop detailed design specifications and documentation - Perform RTL coding and synthesis… more
    Amazon (06/20/25)
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  • Silicon Electrical Engineer - RTL

    ManpowerGroup (Mountain View, CA)
    **Title: Senior Hardware Design Engineer - SoC Integration** **Location:** Mountain View, CA **Experience Level:** Senior (10+ years) **About the Role** ... We are seeking a highly experienced ** Senior Hardware Design Engineer - ...developing small IP blocks. + Proficiency in **SystemVerilog** , RTL design , and scripting languages (Python, Perl).… more
    ManpowerGroup (06/18/25)
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  • Senior SoC Architectural Modeling…

    Amazon (Cupertino, CA)
    …custom-designed accelerator SoCs for use by AWS internal teams. We're looking for a Senior SoC Modeling Engineer to join the team and deliver new functional ... model or infrastructure components, testing, and debug - Work closely with architecture, RTL design , design verification, emulation, and software teams to… more
    Amazon (05/14/25)
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  • Sr. SOC /ASIC Physical Design

    SpaceX (Sunnyvale, CA)
    Sr. SOC /ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design more
    SpaceX (06/19/25)
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  • Sr. SoC Debug Engineer (Server)

    Qualcomm (San Diego, CA)
    …seeking a Senior candidate for the position to perform of SoC Debug Engineer for Server/Compute/Mobile chipsets. **Key Responsibilities:** In this role, the ... Qualcomm's Silicon Validation team is part of the central SoC digital hardware organization responsible for the overall quality..., analyze failures at the embedded platform level. + RTL inspection and understanding of basic RTL more
    Qualcomm (04/02/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer to join...Design team to help develop and improve our RTL and SOC designs + Collaborate with ... Boot controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis...of several modules. + Integrate modules into the overall SOC design and work closely with other… more
    NVIDIA (06/19/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …In-silicon measurement, Reset and Boot controllers. + You will be responsible for the RTL design , logic synthesis, and timing analysis of several modules. + ... NVIDIA is looking for a Senior ASIC Design Engineer to join...Integrate modules into the overall SOC design and work closely with other...like Reset or Chip Boot + Solid frontend ASIC design skills, including RTL design ,… more
    NVIDIA (06/18/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …& bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis and ... We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC 's and GPU's. This… more
    NVIDIA (06/10/25)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    …to multipoint wireless products. + Architecture and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog + Frontend design ... Interface IPs + Chip level integration and verification + RTL design and integration of large functional...BSEE required/MSEE preferred + 5-12 years of experience in SoC design + Experience with Synthesis, Lint,… more
    Tarana Wireless (05/01/25)
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  • Senior Digital Circuit Design

    NVIDIA (Santa Clara, CA)
    …and build constraints for synthesis and drive for timing closure. In addition to RTL design , you'll need to understand the analog schematics and write ... We are now hiring for a Senior Logic and Digital Circuit Design ...Have a deep understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for… more
    NVIDIA (06/08/25)
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  • Senior ASIC Design Engineer - DFX

    NVIDIA (Santa Clara, CA)
    …+ 5+ years of meaningful experience in SOC architecture and design experience. + Experience in micro-architecture and RTL development (Verilog). Verification ... We are now looking for a Senior ASIC Design Engineer - DFX...tools + Good exposure to cross functional areas including RTL & clocks design , STA, place-n-route and… more
    NVIDIA (05/22/25)
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  • Senior ASIC Design Engineer…

    Arrow Electronics (San Jose, CA)
    …evolving, and supporting our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.** + Collaborate with ... **Position:** Senior ASIC Design Engineer (eInfochips Inc)...**What candidate will Be Doing:** + Map multi-million gate SoC designs onto prototyping platforms, creating design more
    Arrow Electronics (06/11/25)
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  • ASIC Design Engineer, Cloud-Scale Machine…

    Amazon (Cupertino, CA)
    …future. Basic Qualifications - BS in Electrical Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years in VLSI engineering - 5+ ... design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications. - Analyze design ,… more
    Amazon (06/18/25)
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  • Senior Design for Debug Architect…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Design for Debug (DFD) Architect and Methodology Engineer! NVIDIA is seeking a DFD Architect to implement hardware and software ... solutions to debug world's leading SoC 's and GPU's. This position offers the opportunity to...other silicon visibility tools. + Great understanding of ASIC design flow including RTL design ,… more
    NVIDIA (06/11/25)
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  • Senior CAD Compiler Engineer

    Qualcomm (San Diego, CA)
    …documentation for CAD/EDA/IP/ASIC projects. Develop scalable automation solutions in the area of RTL design and SoC integration, power, verification, and ... flow automation and collaboration enablement. Utilize and tools/applications (eg, IP/ RTL QA and/or release, subsystem/ SoC integration and/or implementation)… more
    Qualcomm (06/19/25)
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  • Sr. Staff Design Engineer (Low Power)

    Qualcomm (Santa Clara, CA)
    …Wireless Technology team you will be working on WiFi (802.11x) technology, SOC Design , Low Power micro-architecture, Power Intent/Implementation, power estimates ... through the full ASIC development process from specification, RTL implementation, verification, synthesis, timing closure, emulation and post...will also be responsible for the full chip debug design using ARM IPs. Experience in SoC more
    Qualcomm (04/09/25)
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  • Senior System Engineer

    NVIDIA (Santa Clara, CA)
    …and future NVIDIA SOC architectures. + Work with architecture, verification, and RTL design teams to develop and implement bringup and debug plans for ... and debug tools and flows + Execute bringup of SOC RTL and SW on pre-silicon platforms...skills in both hardware and software. + Experience with Design -For-Debug tools and flows (Dstream, step-debugging, cross-triggering, trace, etc)… more
    NVIDIA (05/22/25)
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  • Senior Design Verification Engineer,…

    Amazon (Sunnyvale, CA)
    Description As a Senior Design Verification (DV) Engineer, you will be part of an advanced architecture team that is exploring new hardware designs to improve ... test plan for advanced functional blocks. You will participate in the design verification and bring-up of such blocks by writing relevant assertions, debugging… more
    Amazon (06/13/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC 's and GPU's. This position offers the ... Digital Systems design . + A deep understanding of ASIC design flow including RTL design , verification, logic synthesis, timing analysis, ECO, and post… more
    NVIDIA (05/02/25)
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