- Micron Technology, Inc. (San Jose, CA)
- …performance and reliability of non-volatile memory products. **Position Overview** The Senior Member of Technical Staff Design Engineer in Micron's NVEG organization ... of high-speed IO circuits performance, power and area optimization, chip architecture/floorplan + Demonstrated experience in leading and mentoring others… more
- SpaceX (Sunnyvale, CA)
- Sr . Full Chip Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . FULL CHIP PHYSICAL...and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year… more
- Amazon (Cupertino, CA)
- …better-rounded professional. Basic Qualifications - Deep SOC architectural, micro architectural, chip design, verification and physical design understanding. - ... US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning servers. As a member of… more
- Amazon (Cupertino, CA)
- …US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning servers. As a member of ... and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
- Amazon (Cupertino, CA)
- …US, Europe, Singapore, and Japan, and customers across all industries. Custom SoCs (System on Chip ) live at the heart of AWS Machine Learning servers. As a member of ... integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies...of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For… more
- Teledyne (Camarillo, CA)
- …integrity, metal density rules, transistor, and capacitor matching. + Strong background with full custom circuit, block, and chip layout using Cadence Virtuoso ... the next level with us** ! Teledyne Imaging Sensors is looking for a ** Sr . Manager, Mixed Signal IC Design** responsible for supporting the Read Out Integrated… more
- Skyworks (San Jose, CA)
- Sr . Principal RFIC Engineer Apply now " Date:Nov 7, 2025 Location: San Jose, CA, US Company: Skyworks If you are looking for a challenging and exciting career in the ... cellular mobile communications. At Skyworks San Jose, you'll contribute to the full product lifecycle from concept to production while mastering advanced RF design… more
- NVIDIA (Santa Clara, CA)
- …of high-frequency and low-power CPUs, GPUs, SoCs at block level, cluster level, and/or full chip level, with a focus on netlist-related aspects such as ... and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer, Netlisting to...+ Background with logic synthesis at either block or full - chip level, at project execution and/or flow… more
- NVIDIA (Santa Clara, CA)
- …of Nvidia's GPUs, CPUs, DPUs and SoCs at block level, cluster level, and/or full chip level. + Help in driving frontend and backend implementation including ... with 2+ years experience in Synthesis and Timing + Hands-on experience in full - chip /sub- chip Static Timing Analysis (STA), timing constraints generation and… more
- NVIDIA (Santa Clara, CA)
- … design engineers to drive timing, area, and power closure. + Integrate IP's into full chip ensuring interface specifications are aligned and all full ... We are now looking for a Senior Video ASIC Design Engineer! NVIDIA has been...timing, and area optimization, static checks, and support of physical design engineers through place and route. + Work… more
- Google (Mountain View, CA)
- Senior CPU Architecture and Performance Architect _corporate_fare_ Google _place_ Mountain View, CA, USA; Austin, TX, USA; +3 more; +2 more **Advanced** Experience ... hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Senior CPU Architecture and Performance Architect, you will be the key… more
- Celestica (San Jose, CA)
- …09 **IC/MGR:** Individual Contributor **Direct/Indirect Indicator:** Indirect **Summary** The Senior Lead Software Engineer designs, develops, and maintains software ... and capable of mentoring a team of engineers. The Senior Lead Engineer, Software will work in cross functional...knowledge of BMC related Hardware such as ARM, BMC chip (AST 2500, AST2600, Pilot 4 etc.), HW-monitor and… more
- Google (Fremont, CA)
- Senior Silicon Pre-to-Post Validation Lead, Raxium _corporate_fare_ Google _place_ Fremont, CA, USA **Advanced** Experience owning outcomes and decision making, ... qualifications:** + 15 years of experience in Application-Specific Integrated Circuit/System on Chip (ASIC/SoC) design, with a focus on both digital logic design and… more
- Cisco (San Jose, CA)
- …CMOS products. * You will lead efforts for a large block on a complex chip , mentor team members and track deliverables, participate in peer review of complex IC ... solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security,… more
- Palo Alto Networks (Santa Clara, CA)
- …in person. That's why most of our teams work from the office full time, with flexibility when it's needed. This model supports real-time problem-solving, stronger ... diags (both pizza-box and chassis-based platforms), platform security using TPM chip , development of both kernel and use-space drivers, provisioning of third-party… more
- Applied Materials (Santa Clara, CA)
- …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... techniques to assess equipment and address technical issues, with assistance from Senior Field Service Engineers _[Customer Engineers]_ + Collaborate with Senior … more
- Amazon (Cupertino, CA)
- …* RTL Development for ML Accelerators * Hardware Architecture & Modeling * Physical Design & Power Optimization * Custom Circuit Design * Pre/Post Silicon Validation ... on your project, whether it's distributed training systems or chip design. Your mentor helps navigate any unfamiliar territory....AI innovation. What sets us apart? Many of our senior engineers began their careers as interns here, creating… more
- Applied Materials (Santa Clara, CA)
- …global leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. We design, build and service ... concepts and processes + Ability to operate as a senior technical leader and present projects with minimal supervision...teams, as needed + ASSEET + BSEET (DeVry, TSTC) ** Physical Requirements:** This is a physically demanding position that… more
