• Sr . SoC Design

    SpaceX (Irvine, CA)
    Sr . SoC Design Engineer , DSP Implementation (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity ... the ultimate goal of enabling human life on Mars. SR . SOC DESIGN ENGINEER...learning new skills COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $160,000.00 - $220,000.00/per… more
    SpaceX (05/17/24)
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  • Senior SOC Design

    NVIDIA (Santa Clara, CA)
    Are you looking for a SOC Design Engineer opportunity? If yes, come and join us. The complexity of the chip has greatly increased over the years. We are now ... group is looking for a top ASIC Engineer with a curiosity about SOC design automation, RTL integration, chip build and assembly, and padring design and… more
    NVIDIA (05/10/24)
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  • Sr Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …annually using our products. The CSG Central Applications Engineering team seeks an experienced SoC design engineer to integrate and support Cadence IP ... applications such as Machine Learning, Edge AI, Radar, Audio, Speech , and Vision. Our IP designs are used by...IP integration. + Develop examples and best practices for SoC system design , verification, and testbenches for… more
    Cadence Design Systems, Inc. (05/31/24)
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  • Sr . SOC /ASIC Physical…

    SpaceX (Irvine, CA)
    Sr . SOC /ASIC Physical Design Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future where humanity is out ... of enabling human life on Mars. SR . SOC /ASIC PHYSICAL DESIGN ENGINEER (SILICON...weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $160,000.00 - $220,000.00/per… more
    SpaceX (05/17/24)
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  • Sr . SOC Design

    Amazon (Sunnyvale, CA)
    …AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Sr . Physical Design Engineer to continue to innovate on behalf of our ... Sub-System STA and Signoff for a complex, multi-clock, multi-voltage SoC . - Streamlining the timing signoff criterions, timing analysis...& Route and other local/remote teams to address the design challenges in the context of timing sign-off. -… more
    Amazon (05/28/24)
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  • Senior Lead DFT Design

    Cadence Design Systems, Inc. (San Jose, CA)
    …innovators who want to make an impact on the world of technology. Looking for Lead SoC /ASIC Digital Design Engineer with experience in Design for Test ... Verilog testbenches. Requirements; + Prior 15-20 years of professional experience in SoC /ASIC Digital Design with focus on Design for Test (DFT) + Should… more
    Cadence Design Systems, Inc. (04/06/24)
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  • Sr . ASIC Design Engineer

    SpaceX (Sunnyvale, CA)
    Sr . ASIC Design Engineer , DDR IP (Silicon Engineering) at SpaceX Sunnyvale, CA SpaceX was founded under the belief that a future where humanity is out ... the ultimate goal of enabling human life on Mars. SR . ASIC DESIGN ENGINEER , DDR...support critical milestones COMPENSATION & BENEFITS: Pay range: ASIC/FPGA Design Engineer / Senior : $170,000.00 - $230,000.00/per… more
    SpaceX (03/29/24)
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  • Senior Silicon SoC and Systems…

    Google (Mountain View, CA)
    …software and networking technologies that power all of Google's services. As a Hardware Engineer , you design and build the systems that are the heart of ... on edge devices. + Knowledge of data-flows within the SoC , accelerators (eg, ML, video, audio, graphics), CPU and...infrastructure. You develop from the lowest levels of circuit design to large system design and see… more
    Google (05/21/24)
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  • Sr . Staff Design Engineer

    Qualcomm (Santa Clara, CA)
    …Wireless Technology team you will be working on WiFi (802.11x) technology, SOC Design , Low Power micro-architecture, Power Intent/Implementation, power estimates ... measurements, Si debug and power correlation. + Experience in SoC low power micro-architecture, low power design ...influence over key organizational decisions (eg, is consulted by senior leadership to make key decisions). * Tasks do… more
    Qualcomm (05/17/24)
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  • Sr . Synthesis & Front-End STA…

    SpaceX (Sunnyvale, CA)
    …with the ultimate goal of enabling human life on Mars. SR . SOC /ASIC SYNTHESIS & FRONT-END STA ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging ... Sr . Synthesis & Front-End STA Engineer ...COMPENSATION & BENEFITS: Pay range: Synthesis and Front-End STA Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (05/09/24)
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  • Sr . FPGA Engineer (Falcon)

    SpaceX (Hawthorne, CA)
    …life on Mars. SR . FPGA ENGINEER (FALCON) As a Sr . FPGA Engineer on the Falcon team, you will design and implement signal processing chains needed for ... Sr . FPGA Engineer (Falcon) at SpaceX...meet critical deadlines COMPENSATION AND BENEFITS: Pay Range: FPGA Engineer / Senior : $160,000.00 - $220,000.00/per year Your actual… more
    SpaceX (05/21/24)
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  • Senior Verification Architect, SOC

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking to hire a senior verification architect to design verification methodology for our next generation SOCs with AI capabilities for self-driving ... our unprecedented growth. Are you a creative and autonomous engineer with a real passion for improving design... engineer with a real passion for improving design verification efficiency and pushing barriers? If so, we… more
    NVIDIA (04/16/24)
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  • Sr Security Engineer

    Robert Half Technology (Los Angeles, CA)
    …for consideration* Robert Half (Technology Solutions) is searching for an Senior /L3 Cyber Security Operations Engineer with experience in security ... escalations. If this sounds like your background, then this Senior /L3 Cyber Security Operations Engineer role is...secure system operations. * Collaborate with the team to design and implement effective security policies and procedures. *… more
    Robert Half Technology (05/12/24)
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  • Sr . Staff Engineer

    Qualcomm (San Diego, CA)
    …experience of driver development on any Qualcomm chipset. + Basic understanding of soc IPs such as clocks, PLLs, GPIO, Interrupt Controllers, peripherals such as ... work with the hardware team to contribute/suggest modifications to the hardware board design . + ARM Trust-Zone & ARMv7/v8 architecture with good knowledge on MMU,… more
    Qualcomm (06/06/24)
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  • Interface Systems Engineer , Sr

    Qualcomm (San Diego, CA)
    …interface standards, system-technology co-optimization, power and signal integrity, hardware/software co- design and post-Silicon bring-up to help create leading edge ... and datacenter products. Group is looking for engineers at senior levels with knowledge and experience in SERDES (PCIe,...HBM) or 2D/3D Die-to die(D2D) interface IP and systems design . A successful candidate will be involved in SERDES/Memory/D2D… more
    Qualcomm (06/06/24)
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  • Power Distribution Network Engineer

    Qualcomm (San Diego, CA)
    …products used by millions customers. **Responsibility** + Apply electrical design expertise to develop Power Distribution Network(PDN) solutions, perform simulation, ... and decoupling capacitance scheme. + Work with system designers, design verification and physical design teams to...background in package and PCB extraction, analysis flow and SOC floor planning + Familiar with industry tools (SIWave,… more
    Qualcomm (06/01/24)
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  • Sr . Information Security Engineer

    Applied Materials (Santa Clara, CA)
    …PowerShell ) + Prior experience in operationalizing use cases for SOC /SIEM preferred + Deploy, configure and lead operations multiple insider-threat technologies ... to security solutions. Provide technical advice to clients and teams on design , installation and maintenance of information security. + Evaluate on-premise & Cloud… more
    Applied Materials (06/13/24)
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  • Senior ASIC Design Engineer

    Amazon (Sunnyvale, CA)
    Description As a Sr . ASIC Design Engineer ,...in Verilog HDL - Help define and own ASIC design methodologies - Lead cross functional SOC ... of practical semiconductor ASIC design experience including owning end to end design of major SOC blocks - Successful tape outs as an owner of a major … more
    Amazon (04/09/24)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    …high frequency clocks. + You should be able to engage with multiple teams and design the SOC clocks to satisfy all the architectural constraints. + Your ... The Clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...the above teams. + Collaborate with Software and product design team to debug SOC clock silicon… more
    NVIDIA (05/10/24)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (Santa Clara, CA)
    …** **Job Location: Santa Clara CA** **Job description:** We are seeking a Design Verification Engineer for our full-time role with Capgemini Engineering. **Key ... . ARM based SoC verification experience is an added advantage. . Design Verification background, but more focused or specialized in the python scripting, tool… more
    Capgemini (05/14/24)
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