• Timing and Technology

    Qualcomm (San Diego, CA)
    …Qualcomm Engineers collaborate with cross-functional groups to determine product execution path. As a Timing Engineer , you will play a vital role in Timing ... timing closure, CAD teams, IP teams and Design Technology Teams for flow scripts/tools development and validation. +...for STA timing sign off. + A timing Engineer should be able to understand… more
    Qualcomm (09/23/24)
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  • Sr. SOC/ASIC Timing Signoff & Front-End…

    SpaceX (Irvine, CA)
    Sr. SOC/ASIC Timing Signoff & Front-End Implementation Engineer (Silicon Engineering) at SpaceX Irvine, CA SpaceX was founded under the belief that a future ... goal of enabling human life on Mars. SR. SOC/ASIC TIMING SIGNOFF & FRONT-END IMPLEMENTATION ENGINEER (SILICON...implementing functional ecos. + Knowledge of deep sub-micron FinFET technology nodes (7nm and below) timing challenges,… more
    SpaceX (08/24/24)
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  • CPU Physical Design Timing Engineer

    Qualcomm (Santa Clara, CA)
    …drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design team to develop ... Qualcomm. You will have the opportunity to collaborate with Qualcomm central timing technology & methodology team and also interact with CPU implementation team… more
    Qualcomm (09/23/24)
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  • Senior ASIC Engineer , Timing

    NVIDIA (Santa Clara, CA)
    We are now looking for a motivated Senior ASIC Engineer , Timing to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... improving the netlist and timing quality of our designs and if you are... convergence. NVIDIA is a pioneer in bringing groundbreaking technology to new markets. We have some of the… more
    NVIDIA (09/23/24)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to ... inventiveness and intelligence. What you'll be doing: + Drive timing analysis and closure of Nvidia's GPUs, CPUs, DPUs...the leader of AI computing, and one of the technology world's most desirable employers. We have some of… more
    NVIDIA (09/20/24)
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  • SAW/BAW NPI Design Engineer - Timing

    Skyworks (Irvine, CA)
    SAW/BAW NPI Design Engineer - Timing Devices Apply now " Date:Sep 23, 2024 Location: Irvine, CA, US Company: Skyworks If you are looking for a challenging and ... changing the way the world communicates. Requisition ID: 73151 Job Description: SAW/BAW NPI-Design Engineer - Timing Devices This Engineer position will be… more
    Skyworks (09/18/24)
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  • Timing Methodology Engineer , Custom…

    NVIDIA (Santa Clara, CA)
    …amplify human inventiveness and intelligence. We are seeking an innovative Custom Circuits Timing Methodology Engineer to help drive sign-off strategies for the ... make billions of transistors function on every die at technology nodes as deep as 5 nm and beyond,...an ideal role. What You'll Be Doing: + Develop Timing sign-off flows, constraints and QOR metrics for custom… more
    NVIDIA (09/12/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the ... make billions of transistors function on every die at technology nodes as deep as 5 nm and beyond,...an ideal role. What You'll Be Doing: + Develop Timing sign-off flows, constraints and QOR metrics for custom… more
    NVIDIA (07/27/24)
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  • SRAM Timing Engineer

    NVIDIA (Santa Clara, CA)
    …make a lasting impact on the world! We are currently looking for a SRAM Timing Engineer to join our team of dedicated engineers developing custom SRAM circuits ... you will be doing: + Drive robust methodology for timing analysis of custom circuit IP. + Support SRAM...implementation of STA solutions for multiple circuit design and technology teams and 3rd party EDA tool vendors across… more
    NVIDIA (07/23/24)
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  • Senior Timing Methodology Engineer

    NVIDIA (Santa Clara, CA)
    …to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the ... self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design, and timing ...with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated… more
    NVIDIA (09/18/24)
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  • Implementation Timing / STA Design…

    Qualcomm (San Diego, CA)
    …Group, Engineering Group > ASICS Engineering **General Summary:** As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable ... Team is looking for skilled engineers to focus on timing constraints development, power analysis, STA, and timing... timing constraints development, power analysis, STA, and timing closure for premium-tier chips. This is an excellent… more
    Qualcomm (09/04/24)
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  • Senior Engineer or Physicist…

    The MITRE Corporation (San Diego, CA)
    …to the long-term well-being of our employees. MITRE is different from most technology companies. We are a not-for-profit corporation chartered to work for the public ... wireless communications, signal processing, and PNT [position, navigation, and timing ]. PNT systems, such as GPS, atomic clocks, and...power grids, trade, and more. If you are an engineer or physicist with a desire to learn at… more
    The MITRE Corporation (08/01/24)
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  • Principal Position Navigation and Timing

    The MITRE Corporation (El Segundo, CA)
    …to the long-term well-being of our employees. MITRE is different from most technology companies. We are a not-for-profit corporation chartered to work for the public ... our operational understanding, technical expertise, comprehensive view of the technology landscape, and cross-enterprise connectivity. Our team conducts cutting-edge… more
    The MITRE Corporation (08/08/24)
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  • Lasers and Timing Systems Engineering…

    SLAC National Accelerator Laboratory (Menlo Park, CA)
    …(LCLS) Engineering Division at the SLAC National Accelerator Laboratory seeks a mechanical engineer to lead the Lasers and Timing Systems Engineering Department. ... Lasers and Timing Systems Engineering Department Head Job ID 6025...years of practical experience in the principles behind laser technology , and X-ray generation or combination of education and… more
    SLAC National Accelerator Laboratory (07/18/24)
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  • Senior ASIC Physical Design Engineer - High…

    NVIDIA (Santa Clara, CA)
    …inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you want to challenge ... space, create optimum floorplan, drive synthesis, physical implementation, and timing closure by understanding arch/logic as well as dataflow...the leader of AI computing, and one of the technology world's most desirable employers. We have some of… more
    NVIDIA (09/23/24)
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  • Principal Design Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …develop leaders and innovators who want to make an impact on the world of technology . As a core member of the PHY Design team, your responsibilities will span across ... aspects for the ASIC frontend flow, which includes RTL integration, maintain the timing constraint, Synthesis, Place and Route, Static timing analysis (STA), … more
    Cadence Design Systems, Inc. (08/01/24)
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  • Sr. Principal STA Solutions Engineer

    Cadence Design Systems, Inc. (San Jose, CA)
    …leaders and innovators who want to make an impact on the world of technology . Job Overview: Individual will be leading and executing technical campaigns at various ... internal and external customers. Perform several timing & correlation benchmarks with Cadence Tempus -Signoff tool....with Cadence Tempus -Signoff tool. Execute and deliver on timing analysis, ECO flows, Extraction, Power, EMIR and/or physical… more
    Cadence Design Systems, Inc. (07/03/24)
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  • Principal IO Design Engineer , HBM Design

    Micron Technology, Inc. (Folsom, CA)
    …how the world uses information to enrich life for** **_all_** **.** Micron Technology is a world leader in innovating memory and storage solutions that accelerate ... **Our Opportunity Summary:** For more than 43 years, Micron Technology , Inc. has redefined innovation with the world's most...We are looking for a HBM High-speed IO Design Engineer . Are you passionate about crafting circuits for the… more
    Micron Technology, Inc. (07/25/24)
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  • Senior Logic Design Engineer , Cache…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Logic Design Engineer ! Asa member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip ... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you… more
    NVIDIA (07/21/24)
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  • ASIC Design Engineer - New College Grad

    NVIDIA (Santa Clara, CA)
    We are now looking for a Logic Design Engineer . As a member of our CPU Logic Design Team, you will be responsible for CPU on-chip interconnect network, coherency and ... tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you… more
    NVIDIA (07/03/24)
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