- Qualcomm (San Diego, CA)
- …**Required Qualifications:** + Intelligent and high potential of learning new topics. + Familiarity with DDR interface, JEDEC spec, bus level view of ... create a smarter, connected future for all. Qualcomm's Silicon Validation team is part of the central SoC digital...languages and methodologies included in this team are: + DDR related debug + Regressionand PVT testing + Emulation… more
- Qualcomm (San Diego, CA)
- …Engineering Group > ASICS Engineering **General Summary:** As a SoC Power/Performance Post-Si Validation & Emulation Engineer , you will be a vital member of ... of SoC silicon by employing both pre-silicon (emulation) and post-silicon validation techniques. This role involves verifying SoC/CPU/GPU/ DDR /NOC blocks,… more
- Amazon (San Diego, CA)
- …to firmware-hardware interaction debugging. * Knowledge of DFT/DFD, scan chain, or BIST validation . * Familiarity with signal processing concepts and/or RF test ... the world. We are seeking a highly motivated and experienced Post-Silicon Verification Engineer with strong expertise in Digital ASIC and modem (PHY and MAC layer)… more
- Blue Cheetah Analog Design (Sunnyvale, CA)
- Silicon Validation Engineer Engineer [On-site Position - Sunnyvale, CA] Blue Cheetah Analog Design Inc. is a semiconductor technology start-up headquartered ... Description: * Use your silicon test experience to perform validation and qualification of our D2D silicon testchips *...tests * Thorough knowledge of oscilloscopes and BERTS * Familiarity with concepts of Jitter, Noise, & other non-idealities… more
- Qualcomm (San Diego, CA)
- …and characterization. + Understanding firmware with the ability to write code (for DDR Training). + Familiarity with JEDEC specifications at electrical and ... Engineering, or related field and 4+ years of ASIC design, verification, validation , integration, or related work experience. OR Master's degree in Science,… more
- Amazon (San Diego, CA)
- …a new system with few legacy constraints. The Sr. FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions to ... solutions - Design and debug high-speed interfaces including Ethernet, PCIe, and DDR - Debug hardware issues using logic analyzers and oscilloscopes - Create… more
- Qualcomm (San Diego, CA)
- …SERDES Interfaces such as PCIe, USB4, UFS, DP, MIPI(DSI,CSI), PLLs and leading edge LP- DDR & PC- DDR Subsystem components (DRAM, DRAM Controller, Mixed Signal PHY ... data analysis of parametric performance over various operating conditions and configurations. Engineer will also assist in HW design and debug power integrity (PI)… more
- Qualcomm (San Diego, CA)
- …+ Master's degree in Electrical or Computer Engineering Experience with/in: + Familiarity of overall SoC Infrastructure - DDR , Busses, CPUs, I/Os ... smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog),...power sequencing and multi-voltage domain design + Power analysis familiarity in areas of clocktree, peak power, TDP, limits… more
- Capgemini (Santa Clara, CA)
- …**Preferred Skills** + Solid knowledge of SoC design methodologies and the complete design validation cycle. + Familiarity with key protocols such as PCIe, USB, ... **About the Job You're Considering** We are seeking an experienced Emulation Engineer with hands-on expertise in Zebu platforms. **Your Role** **As an Emulation … more
- NVIDIA (Santa Clara, CA)
- …understand the world. NVIDIA is seeking a Senior Cloud Service Provider (CSP) Application Engineer to join our team. In this role, you will collaborate with other ... concepts and help them with integration of design and validation all the way to deployment as part of...deployment. + Solid understanding of x86 server architecture, PCIe, DDR , Infiniband and high-speed interconnects + Basic understanding of… more