- Qualcomm (San Diego, CA)
- … team to complete the IP design implementation. + Support SoC team to integrate low power / power management IP solution into wireless SoC chips and ... functional safety feature in automotive SoC product. + Create/Enhance low power methodologies covering entire design...cycle from RTL to GDS. Analyze how a new methodology will affect different phases of the design… more
- Qualcomm (San Diego, CA)
- …of next Generation, high performance, low power Memory Subsystem RTL Design , flows and methodology for high performance ASICs in sub-4nm process for ... low power designs. + Strong knowledge in the entire low power , high performance ASIC/SoC design flows (micro-architecture, RTL design ,… more
- Qualcomm (San Diego, CA)
- … analysis concepts and on-hands experience with PTPX etc. ⦁ Sound conceptual understanding of low power design techniques like voltage/ power islands, ... and validate new flows and methodologies ⦁ Work on design power profiling and electromigration analysis ⦁...in languages such as Python, TCL, Perl ⦁ Strong methodology development background. Ability to drive solutions by creating… more
- Qualcomm (San Diego, CA)
- …issues wrt constraints validation, verification, STA, Physical design , etc. + Knowledge of low power flow ( power gating, multi-Vt flow, power supply ... to high frequency design convergence for physical design with PPA targets and PDN methodology ....**Principal Duties and responsibilities:** + Complete ownership on Conformal Low Power and Formal Verification signoff for… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... + Experience with pre-silicon emulation platform-based verification + Knowledge of Power design , architecture, and verification requirements + Displays a… more
- Qualcomm (San Diego, CA)
- …the rare opportunity to have real impact in shaping 5G product lines ranging from low power Snapdragon chips to the growing field of Machine Learning (AI/ML) and ... in the whole industry. As an SOC Verification and Methodology Engineer, you will be responsible for ensuring the...AMBA Bus, DDR, GPU, Multimedia etc. + Knowledge of Power design , architecture, and verification requirements +… more
- Qualcomm (San Diego, CA)
- …+ **Required Skills:** + Understanding of SoC Power Delivery Network architectures, Low Power Design Techniques for different market segment products ... IPs on emulation and post-silicon platforms. + Collaborate with IP/ Design Teams and power architects to define...+ Strong familiarity with Static Timing Analysis and Physical Design tools & methodology . + Solid understanding… more
- Qualcomm (San Diego, CA)
- …Modelsim/Questa, VCFormal, Jaspergold, 0In and others. **Preferred Qualifications:** + Experience with Low power design verification, Formal verification and ... verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low power verification, Formal verification and Gate level simulation… more
- Qualcomm (San Diego, CA)
- …Team for design and development (RTL to GDS) of various highspeed and low power IP's (mini-macros) which are used across different sub-systems in SoC. In ... digital IP from RTL to GDS for optimizing SoC Power , Performance and Area (PPA). It includes the IP...LEF abstract, DEF, etc) for SoC consumption. + Conduct design reviews and documentations. + Flow and methodology… more
- Google (San Diego, CA)
- …learning, Neural Processors, Multimedia, or GPUs. + Experience with methodologies for low power estimation, timing closure, and synthesis. + Experience leading ... field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + 4 years of experience in… more
- Amazon (San Diego, CA)
- …end hand off ownership - Digital design RTL2GDS experience with emphasis on methodology and best practice - Power estimation and optimization - Back end tool ... Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low...teams. This is an opportunity to define the digital design environment and deploy methodology of a… more
- Amazon (San Diego, CA)
- Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... you will engage with an experienced cross-disciplinary staff to conceive and design innovative product solutions. You will work closely with an internal… more
- Qualcomm (San Diego, CA)
- …of advanced DFT/DFD ( Design for Test/ Design for Debug) techniques for low power , multi voltage designs. The successful candidate will help in the ... for Test/ Design for Debug) techniques for low power and multi voltage domain designs....of DFT is required + Understanding of core-based test methodology and scan isolation. + Knowledge of various fault… more
- Amazon (San Diego, CA)
- Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... you will engage with an experienced cross-disciplinary staff to conceive, design , and scale innovative semiconductor product manufacturing solutions for Kuiper's… more
- Amazon (San Diego, CA)
- Description Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low -latency, high-speed broadband ... leading and optimizing the EDA environment for project Kuiper Digital and RFIC design teams. You will oversee the complete RTL-to-GDS flow, manage tool deployments,… more
- Qualcomm (San Diego, CA)
- …collaboratively across teams and organizational boundaries, including with Hardware design & Verification, Software, Product Management and Product Planning teams ... leading SoC-wide solutions that provide the best-in-class cost, performance, and power . Efficiently communicate experimental results, review with technical leads and… more
- Qualcomm (San Diego, CA)
- …+ Pushing PPA to best possible extent using knowledge of high performance and low power implementation techniques + Execute and deliver project goals in a ... analysis, constraints and other physical implementation aspects + Familiar with digital flow design and industry standard tools used for RTL to GDS implementation +… more