- Google (San Diego, CA)
- …technology process nodes. + Experience with ASIC design flows and methodology of static timing analysis . + Experience in extraction of design ... Google (https://careers.google.com/benefits/) . + Be responsible for delivering System-on-Chip (SoC) Static Timing Analysis . + Define SoC timing signoff… more
- Qualcomm (San Diego, CA)
- …Snapdragon chips powering billions of mobile devices. The position requires Signoff Timing and spice simulation experience, with CAD development skills to define and ... for accuracy, compute, in close collaboration with Snapdragon Physical Design and Timing teams. Qualcomm is using leading edge internal and EDA technologies in… more
- Qualcomm (San Diego, CA)
- …for all Qualcomm chipsets in latest DDR technologies. This position requires involvement in static timing analysis (STA) and closure of DDR PHY interface ... **Required for this Role:** + 2+ years industry experience with static timing analysis (STA) and PrimeTime constraints development. + Unix/Perl/TCL… more
- Microsoft Corporation (San Diego, CA)
- …+ OR equivalent experience. + 8+ years of experience in Physical Design, specifically Static Timing Analysis and Convergence domains. + 8+ years of ... the Cloud infrastructure. We are looking for a **Principal Timing /STA Engineer ** to join the team. **Responsibilities**...drive timing constraints and methodology. + Conduct timing analysis and sign-off for critical paths,… more
- Qualcomm (San Diego, CA)
- …setup for various modes/corners and low-power multi-voltage domain crossings, and signoff with static timing analysis . + Collaborate closely with RTL design ... Team is looking for skilled engineers to focus on timing constraints development, power analysis , STA, and timing closure for premium-tier chips.… more
- Qualcomm (San Diego, CA)
- …also have experience with industry standard chip design tools and design flows for Static Timing Analysis , Spice / Fast spice simulation, Synthesis, DFT, ... automation skills. Hands-on experience in EDA tool automation, data analysis and visualization & large-scale software automation enablement. Excellent understanding… more
- Qualcomm (San Diego, CA)
- …in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime toolset and should have ... power analysis and optimization, and IR drop analysis and optimization is also helpful. The engineer...Skills and Experience :** + Strong conceptual understanding in static timing analysis . Hands-on experience… more
- Meta (San Diego, CA)
- …plan development and verification. 3. Define timing constraints, run synthesis and static timing analysis . 4. Support the test program development, chip ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will work...blocks into larger SOC environments. 7. Assist with performance/power analysis of the design and help meet the power… more
- Qualcomm (San Diego, CA)
- …design and timing closure teams in closing timing involving I/Os. Familiarity to static timing analysis tools and flows is a must. + Engage with EDA ... and in delivering design kit including behavioral models and timing models for I/Os, memories and standard cell libraries...+ Review and guide the development of stimulus for timing and power characterization, ensuring alignment with I/O circuit… more
- CDM Smith (San Diego, CA)
- …of Science in Civil Engineering with a Structural Focus. - Professional Structural Engineer license. - Experience with analysis and design of reinforced concrete ... codes and application to design situations. - Strong theoretical background in static and dynamic analysis of hydraulic structures and appurtenances with… more
- Qualcomm (San Diego, CA)
- …Design validation in terms of + Clock Domain Crossing (CDC) check + Synthesis and Static Timing Analysis + Formal and functional verification + Lint check ... coding + Familiarity with front-end design flows (synthesis, formal verification, static timing analysis , CDC) is a plus **Minimum Qualifications:** *… more
- Qualcomm (San Diego, CA)
- …working with Xilinx's Vivado tools + Hands-on experience on validation and debug methodologies, static timing analysis , and timing closure + Proficient ... federal, local, and foreign governments. In this role as a Hardware Engineer , you will support government-sponsored research, development, integration and test of… more
- Qualcomm (San Diego, CA)
- …Design Networks PDN-planning + Place & Route + Clock Tree Synthesis and customization + Static Timing Analysis + Understand Timing constraints + Fixing ... > ASICS Engineering **General Summary:** We are looking for a physical design engineer to join our design team in San Diego California. Successful candidate will… more
- Qualcomm (San Diego, CA)
- …> GPU ASICS Engineering **General Summary:** **Preferred Qualifications:** + Experience in static timing analysis , constraints and other physical ... using TCL and preferably Perl/Python as well. **Responsibilities** **:** + Timing analysis , validation and debug across multi-mode, multi-voltage domain… more
- Qualcomm (San Diego, CA)
- …- Synopsys Fusion Compiler, ICC2 and Cadence Genus/Innovus + Must have good knowledge of static timing analysis , reliability and power analysis + Strong ... teams to maximize PPA + Engaging in cross-functional collaboration with verification, timing , power, and packaging teams to ensure holistic design convergence +… more
- Qualcomm (San Diego, CA)
- …to work independently with little supervision. **Preferred Qualifications:** + Strong familiarity with Static Timing Analysis and Physical Design tools & ... ASICS Engineering **General Summary:** As a SoC Power/Performance Post-Si Validation & Emulation Engineer , you will be a vital member of our Global SoC System… more
- Qualcomm (San Diego, CA)
- …- Synopsys Fusion Compiler, ICC2 and Cadence Genus/Innovus + Must have good knowledge of static timing analysis , reliability and power analysis + Strong ... block closure + Hands on experience with Synthesis, DFT, Place and Route, Timing and Reliability Signoff + Hands on experience working with very complex designs… more
- Qualcomm (San Diego, CA)
- …and familiarity with simulation environments + Hands-on experience on validation and debug methodologies, static timing analysis , and timing closure + ... federal, local, and foreign governments. In this role as a Hardware Engineer , you will support government-sponsored research, development, integration and test of… more