- Micron Technology, Inc. (San Jose, CA)
- …to practical design challenges. **What Sets You Apart:** + Experience with FPGA / ASIC design using HDL languages (Verilog, VHDL, SystemVerilog). + ... circuits, including system and POL power supplies. + Lead FPGA design using HDL and coordinate component...Familiarity with FPGA / ASIC development tools such as Vivado or… more
- Google (Mountain View, CA)
- ASIC Design Verification Engineer, Devices and Services _corporate_fare_ Google _place_ Mountain View, CA, USA **Mid** Experience driving progress, solving ... unparalleled performance, efficiency, and integration. As an Application-Specific Integrated Circuit ( ASIC ) Design Verification Engineer, you will be… more
- Google (Mountain View, CA)
- Staff ASIC Design Verification Engineer, Platforms and Devices _corporate_fare_ Google _place_ Mountain View, CA, USA **Advanced** Experience owning outcomes ... architecture, scripting languages, Software (SW) development frameworks and their impact on Design Verification (DV). + Experience creating and using … more
- Meta (Sunnyvale, CA)
- …apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Manager, Design Verification Responsibilities: 1. Build successful world-class ... and architectural modeling, silicon architecture, micro-architecture, RTL development). 3. Design Verification , FPGA emulation, co-simulation, simulation… more
- The Boeing Company (Mountain View, CA)
- …& Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead, or Senior) to ... across the company and around the world and support ASIC / FPGA design and verification...HDL coding, and physical design realization (through gate -level netlists for ASIC designs) + Integrate… more
- NVIDIA (Santa Clara, CA)
- …emphasis on Synopsys Protocompiler or Synplify Premier and Xilinx Vivado + Exposure to ASIC design and verification tools (VCS or equivalent, Verdi, GDB). ... + Build FPGA prototypes by making RTL FPGA -friendly, partitioning the design and taking it...and testing infrastructure and verify the correctness of the design . + Good coordination with architects, designers, verification… more
- Cisco (San Jose, CA)
- …through to high volume manufacturing. Creative Hardware Engineering positions are available in: + ASIC Design and Verification + System/Board Design + ... signal integrity, power electronics, or embedded system design . + Knowledge of FPGA / ASIC design flow and basic understanding of VHDL/Verilog is a plus.… more
- Butler America (Sunnyvale, CA)
- FPGA Design / Verification Engineer Location:...Range: $75-90 The selected candidate will be responsible for ASIC & FPGA development on R&D program. ... discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC / FPGA engineers to create leading edge products for future… more
- Google (Sunnyvale, CA)
- …aboutbenefits at Google (https://careers.google.com/benefits/) . **Responsibilities** + Define and develop Field-Programmable Gate Array ( FPGA ) based ... experience. + 4 years of experience working in an ASIC or FPGA design technical...protocols such as AXI4, Avalon etc. + Experience with FPGA design and verification tools… more
- Cisco (Milpitas, CA)
- …complexity of system hardware and software interactions. In addition, having experience in FPGA design and can write RTL code, run simulations, address timing ... degree and 5+ years of related experience. *Experience with FPGA or ASIC development from specification to...years of related experience. *Experience with UVM and/or VMM Verification methodology. *Experience with high-speed design debug.… more
- Amazon (Cupertino, CA)
- …debug, as well as performance, power, area analysis and trade-offs - Experience with modern ASIC / FPGA design and verification tools - Experience with SOC ... customers change the world. We are seeking a Hardware Design Engineer with role in the definition, design and validation of AWS next generation ML Chips, Cards… more
- NVIDIA (Santa Clara, CA)
- …we need to see: + BS / MS or equivalent experience. + 3+ years of ASIC verification experience of complex design units displaying good attention to detail, ... teamwork, problem solving and shown success + Exposure to design and verification tools (VCS or equivalent...Background with System Verilog and UVM based methodology for ASIC verification . Ways to stand out from… more
- NVIDIA (Santa Clara, CA)
- …emphasis on first pass success. + Collaborate and partner with ASIC design engineers, IP architects and other verification engineers to formalize product ... or Computer Engineering (or equivalent experience) + 5+ years of proven design verification experience + Expertise in verifying sophisticated IP's with… more
- Microsoft Corporation (Mountain View, CA)
- …+ 3 years of developing UVM-based testbenches or completion of formal design verification (DV) training. **Other Requirements:** Ability to meet Microsoft, ... Verify IP blocks for Microsoft's next-generation cloud servers using FPGA and ASIC technologies. + Collaborate with...and/or Perl for scripting and automation. + Experience with FPGA design , implementation, and debug tools. +… more
- Amazon (Sunnyvale, CA)
- …a Sr. RTL Design Engineer - Wireless Modem within a high performance ASIC design team. This team is using industry leading methodologies to develop ... solutions, and meeting the power objectives . Create standalone verification test bench to verify the correctness of your...related field, or equivalent experience. . 7+ years in FPGA digital logic design , preferably in DSP… more
- Google (Sunnyvale, CA)
- …with product teams to ensure that goals are met with systems and will work with ASIC / FPGA , software, and verification teams to ensure proper verification ... data center engineering, server, storage, and networking products. + Experience with FPGA /CPLD design and interfacing with other disciplines, including software,… more
- Meta (Sunnyvale, CA)
- …implementation. 16. SystemVerilog OVM/UVM experience. 17. Experience in SoC integration and ASIC architecture. 18. Experience with low power design and ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...Computer Vision/Image Sensing IP. 2. Contribute to chip-level integration, verification plan development and verification . 3. Define… more
- Meta (Sunnyvale, CA)
- …to help meet the power requirements 14. Experience in digital design Micro-architecture, SoC integration, ASIC architecture and graphics accelerators ... **Summary:** As a Digital Design Engineer at Meta Reality Labs, you will...definition and RTL implementation 2. Contribute to chip-level integration, verification plan development and verification 3. Define… more
- Google (Sunnyvale, CA)
- …with Product teams to ensure that goals are met with systems and will work with ASIC / FPGA , Software, and Verification teams to ensure proper verification ... Staff Hardware Systems Design Engineer, Board and Systems _corporate_fare_ Google _place_...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …Experience on memory subsystem verification and/or performance analysis* Strong knowledge of ASIC flow, RTL design in Verilog, System Verilog and FPGA ... an impact on the world of technology. Senior Applications Engineer - DDR Design IPJob Location: San Jose, CAJob DescriptionThe Cadence IP team develops industry… more
