- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...most sophisticated strategies of signing off timing in design for world-class silicon performance.… more
- NVIDIA (Santa Clara, CA)
- …GPUs. + Explore design space, create optimum floorplan, drive synthesis, physical implementation, and timing closure by understanding arch/logic as well as ... intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic... design and implementation. + Hands-on experience in physical synthesis, floor planning, P&R, and timing … more
- Capgemini (Santa Clara, CA)
- **Job Title : Senior ASIC Physical Design ...Timing with SI and OCV, Power, IR and Physical Verification at both block and chip level + ... **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Senior ASIC Physical Design Engineer_ **Location:** _CA-Santa Clara_ **Requisition ID:**… more
- NVIDIA (Santa Clara, CA)
- …MTBF analysis, logic synthesis, netlist quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence, timing ... intelligence. We are now looking for a motivated ASIC Physical Design Engineer, Netlisting to join our...understanding of hardware architecture and hands-on skills in RTL/logic design for timing closure. + Experience in… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... you'll be doing: + Responsible for all aspects of physical design and implementation of GPU and...+ Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop… more
- NVIDIA (Santa Clara, CA)
- …interconnect network and last-level caches , working closely with the physical design team on implementation, synthesis and timing closure as well as working ... a liaison between Logic design and Physical design teams responsible for achieving timing , area, performance and power goals of the unit. + Help define… more
- NVIDIA (Santa Clara, CA)
- …and Verification. + Strong background with hierarchical design approach, top-down design , budgeting, timing and physical convergence. + Familiar with ... strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics...floorplan, power and clock distribution, chip assembly and P&R, timing analysis and closure, power and noise analysis and… more
- NVIDIA (Santa Clara, CA)
- …meet performance, timing and power targets. + Deliver a synthesis/ timing clean design while working with the physical design team ensuring a routable ... We are looking for a Senior CPU Design Engineer! NVIDIA is...with architects, design engineers, verification engineers, and physical design engineers teams to accomplish your… more
- NVIDIA (Santa Clara, CA)
- …and floorplan improvement opportunities + Solve timing and routing congestion issues with physical and ASIC design teams by influencing early design and ... We are now looking for a Senior ASIC Floorplan Design Engineer! NVIDIA...What you will be doing: + Working with architects, design leads, physical design leads… more
- Microsoft Corporation (Mountain View, CA)
- …the implementation meets both architectural and micro-architectural intent. + Interface with architecture, physical design (PD), design for test (DFT), and ... and augmented reality. We are looking for a ** Senior Logic Design Engineer** to work in...Crossing (CDC), Reset Domain Crossing (RDC), power etc. + Timing closure of high-performance digital Intellectual Property (IP) +… more
- NVIDIA (Santa Clara, CA)
- … by working closely with verification engineers. + Deliver a synthesis/ timing clean design while working with the physical design team to ensure a ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...+ Collaborate with architects, verification engineers, software engineers, and physical design engineers to accomplish your goals.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... improving the netlist and timing quality of our designs and if you are...analysis on the design . + Drive the design and physical implementation of digital and/or… more
- Teledyne (Mountain View, CA)
- …circuits and related development. Participates in all phases of physical design , including floor planning, clock synthesis, timing optimization, and signal ... + Modeling and analysis + Schematic capture + Circuit simulation + Layout and physical design + Debug and verification for individual sub-blocks or top-level… more
- Amazon (Cupertino, CA)
- …scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies and ... designers to drive architectural feasibility studies, explore power-performance-area tradeoffs for physical design closure - Drive IO/Core block physical… more
- SpaceX (Sunnyvale, CA)
- …work extended hours and weekends as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer/ Senior : $170,000.00 - $230,000.00/per year Your ... Sr. SOC/ASIC Physical Design Engineer (Silicon Engineering) at...(eg synthesis, floorplanning, power/ground grid generation, place and route, timing , noise, physical verification, electromigration, voltage drop,… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …static timing analysis and constraint development + Understanding of fundamental physical design flows and stages + Understanding impacts of analog and ... to join a dynamic and growing team of engineers developing high-speed physical IP for industry-standard protocols. The successful candidate will be a highly… more
- Microsoft Corporation (Mountain View, CA)
- …Azure cloud servers, clients, and augmented reality. We are looking for a ** Senior Design Engineer** to work in the dynamic Microsoft Artificial Intelligence ... program you will be interacting with various teams, including architecture, verification, and physical design , ensuring that the design is implemented and… more
- NVIDIA (Santa Clara, CA)
- …all aspects of GPU and CPU clocking. The team collaborates with the front design team to understand the clocking requirements for the chip. The clocks team interacts ... floor-planning and back end team to help craft the physical floorplan of the chip. The team explains the...with other architects, ASIC designers and verification engineers to design high frequency clocks. + You should be able… more
- NVIDIA (Santa Clara, CA)
- …crafting all aspects of SOC clocking. The team collaborates with the front end design team to understand the clocking requirements for the chip, interacts with the ... floor-planning and back end teams to help craft the physical floorplan of the chip and explains the programming...with other architects, ASIC designers and verification engineers to design high frequency clocks. + You should be able… more
- Microsoft Corporation (Mountain View, CA)
- …and sustainability related to Microsoft cloud hardware. We are looking for ** Senior Mixed-Signal Intellectual Property Register Transfer Level (IP RTL) Design ... will manage and optimize the Cloud infrastructure. We are looking for a ** Senior ** **Mixed-Signal Intellectual Property Register Transfer Level (IP RTL) Design … more