- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC DFT Engineers within our Infrastructure organization to work on Design for Test ( DFT ) methodologies, implementation, and ... DFT EDA tools and IEEE standards (1149, 1500, 1687). **Required Skills:** ASIC Engineer, DFT Responsibilities: 1. Develop and implement DFT strategies… more
- Cisco (San Jose, CA)
- ASIC Engineering Technical Leader - SDC...fullchip SDCs and work with the Physical Design and DFT teams to close fullchip timing in multiple timing ... service provider networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large multi-geography silicon… more
- NVIDIA (Santa Clara, CA)
- …at NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... We are now looking for a Senior ASIC Design Engineer - DFX! NVIDIA has continuously...critical role in shaping the architecture, design, implementation, and verification of DFT IPs for our next-generation… more
- Cisco (San Jose, CA)
- ASIC Engineering Technical Leader (Design) Apply (https://jobs.cisco.com/jobs/Login?projectId=1437840) + Location:San Jose, California, US + Area of ... working together to ensure the successful deployment of the ASIC in products. **Your Impact** + Development of high-performance...and support our design methodology. + Collaborate with the verification , PD, DFT , Package and SW teams… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We are looking for individuals with experience in front-end ... Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical Synthesis using… more
- Amazon (Cupertino, CA)
- …Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Amazon (Cupertino, CA)
- …distribution, timing optimization, place and route, power integrity analysis, and physical verification * Write Tcl or PERL scripts to improve physical design flows ... and methods * Collaborate with RTL, DFT designers to ensure high quality design implementation Basic Qualifications Bachelors' degree or higher in Electrical… more
- Broadcom (San Jose, CA)
- …with GLS with & without parasitic annotated simulations + Prior experience in verification of the DFT design, architecture, and microarchitecture + Experience in ... this highly visible role you will be working on ASIC for data center connectivity applications.Qualifications include: + BSc...developing verification environments for various DFT patterns like,… more
- Broadcom (San Jose, CA)
- …+ Prior experience in generating UVM RAL model + Prior experience in verification of the DFT design, architecture, and microarchitecture + Proficient with ... Broadcom is looking for a senior level Digital Design Verification engineer. In this highly visible role you will...this highly visible role you will be working on ASIC for data center connectivity applications. Qualifications include: +… more
- Cisco (San Jose, CA)
- …industry. **Your Impact:** You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus ... custom DFT logic & IP integration; familiarity with functional verification **Preferred Qualification:** + DFT CAD development - Test Architecture,… more
- Google (Sunnyvale, CA)
- …a related field, or equivalent practical experience. + 8 years of experience in ASIC /chip design with leadership and technical ownership. + 8 years of experience ... are critical to our next-generation products, contributing to the life-cycle of ASIC development while actively managing our external technical engagements. The… more
- Microsoft Corporation (Mountain View, CA)
- …+ DRC (Design Rule Checking) + Develop basic test benches. + Support verification , DFT (Design for Test), and post-silicon validation activities in collaboration ... teams. + Collaborate effectively with: + Architects + Analog mixed-signal designers + Verification engineers + Physical design and DFT teams + Other front-end… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved ... ideal for someone with several years of hands on ASIC /IC design experience who is looking for a new...an absorbing customer facing role. This role requires strong technical capability in Cadence tools (or similar), flow development,… more
- Meta (Sunnyvale, CA)
- …research silicon to demonstrate and integrate advanced IP and AI accelerators into SOC/ ASIC solutions to enable in-system testing and prototyping. The goal is to ... effective collaboration and communication with Digital Design Engineers, Digital Verification Engineers, Research Scientists and Cross Functional Partner teams will… more
- Amazon (Cupertino, CA)
- …Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help ... scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze new technologies and… more
- Google (Sunnyvale, CA)
- …behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on ... you will work on the physical implementation of Application-specific Integrated Circuits ( ASIC ) using advanced technology nodes. You will work on timing margin… more
- Broadcom (San Jose, CA)
- …**Experience in integrating the front end design with DV for test methodologies and verification . Providing guidelines for GLS, DFT & Verification .** + ... development, floorplan, guidelines for Place and Route.** + **Evaluating timing signoff, verification and IP Integration and system level verification .** +… more
- NVIDIA (Santa Clara, CA)
- …+ A working understanding of floor-planning, ASIC physical design, VLSI and DFT . + A hands on technical background; excellent C programming and low-level ... details for features that improve security of our GPUs. + Drive implementation and verification of hardware features that improve security of our GPUs. + You will… more
- NVIDIA (Santa Clara, CA)
- …yield enhancement and spec validation + Partner with other engineering groups including ASIC , DFT , ATE, silicon validation, fab process, software and quality ... groundbreaking innovations involving crafting creative solutions for system level diag, verification and post-silicon validation of some of the industry's most… more
- Meta (Sunnyvale, CA)
- …(CTS), routing, static timing analysis and signoff 2. Collaborate with RTL design, DFT , verification , and power teams to ensure seamless integration and secure ... obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior… more