• IC Packaging Principal Application…

    Cadence Design Systems, Inc. (San Jose, CA)
    …Cadence tool set in the context of multiple flows including IC Packaging , high speed design, signal integrity and electrical constraints definition. Design ... experience and industry knowledge of current IC Packaging Design and manufacturing processes is...is required. + In-depth knowledge of EDA industry, Signal Integrity , Power Integrity is a… more
    Cadence Design Systems, Inc. (05/23/25)
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  • R&D Engineer IC Design

    Broadcom (San Jose, CA)
    …designs in parallel. Basic understanding of routing structure impact on high-speed signal integrity (SI), power integrity (PI), and thermal analysis is ... solder bumps, and interconnect technologies. + Basic understanding of high-speed signal integrity (SI), power integrity (PI), and thermal analysis.… more
    Broadcom (05/24/25)
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  • Principal Engineer, Packaging Engineering

    SanDisk (Milpitas, CA)
    …computational and/or experimental solid mechanics, is required. In-depth knowledge of IC packaging is highly desired. **Qualifications** REQUIRED: + Ph.D. ... world we're living in and that we have the power to shape. Sandisk meets people and businesses at...academic coursework or experience required in mechanical engineering of IC packaging and related areas. + Strong… more
    SanDisk (05/02/25)
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  • Signal and Power Integrity Engineer

    Qualcomm (Santa Clara, CA)
    …professional engineering environment to perform a variety of signal and power integrity tasks and collaborate with package and IC designers to optimize the ... architectures for Data Center products + Electrical model extraction and signal and power integrity simulations will constitute the majority of the tasks. +… more
    Qualcomm (06/05/25)
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  • ASIC Package Signal/ Power Integrity

    Cisco (San Jose, CA)
    …Your Impact Cisco SiliconOne ASIC team is looking for an expert in Signal and Power Integrity to help us develop our next generation ASIC packaging . ... ASIC team with experts in all aspects of advanced IC package design and heterogeneous system integration. Our substrates...field * 7+ years of experience in Signal and/or Power Integrity * Strong background in Electromagnetics… more
    Cisco (04/02/25)
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  • R&D Engineer Adv Tech Dev 1

    Broadcom (San Jose, CA)
    …development, s-parameter extraction/comprehension and optimization [RL, NEXT/FEXT, IL etc.], and power integrity [PI] requirements) + Work with business unit ... node silicon (7nm & 5nm) POR definition + Manage IC packaging activity from concept through development,...fresh-out will be considered + Deep understanding of signal integrity and power integrity concepts… more
    Broadcom (05/14/25)
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