- NVIDIA (Santa Clara, CA)
- … Silicon Solutions Engineering group, you will innovate and drive memory qualification on current and future Tegra/GPU silicon /products. Cross-team ... controller and DRAM have paved the way for successful silicon productization. + Optimizing Memory IO settings to support multiple memory configurations… more
- Microsoft Corporation (Santa Clara, CA)
- …Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer. You will join our front-end silicon team and ... be responsible for delivering cutting-edge, high performance, low power, scalable and programmable DPU silicon . As a Senior Silicon Engineer in the Data… more
- NVIDIA (Santa Clara, CA)
- …+ Build supporting tools/script/infrastructure with relevant stakeholder teams. + Lead post - silicon bringup and support debug activities. + Continuously optimize ... pushing the boundaries to tackle complex challenges across diverse industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of… more
- Google (Mountain View, CA)
- …power in mobile SoCs from CPU architecture and design to schedulers, governors and post - silicon tuning for power and performance. + Experience with ASIC power ... computer architecture concepts, including microarchitecture, cache hierarchy, pipelining, and memory subsystems. + 5 years of experience in SoC...+ Experience with ASIC design flows from concept to post - silicon . Be part of a team that… more
- NVIDIA (Santa Clara, CA)
- …of experience in a management position coordinating global, multi-functional teams throughout pre- silicon and post - silicon phases. + Deep technical expertise ... is driven by its phenomenal technology and outstanding people. Join NVIDIA's Silicon Solutions Group (SSG) as a pivotal engineer within our Hardware Architecture… more
- Google (Sunnyvale, CA)
- …design verification. + Experience in Power aware verification, Gate level simulations, and Post silicon bring-up. + Familiarity with ASIC standard interfaces and ... tools, languages and methodologies relevant to the development of silicon -based ICs and chips. + Experience with SystemVerilog (ie... memory system architecture. In this role, you'll work to… more
- NVIDIA (Santa Clara, CA)
- …computing. What you will be doing: + Develop methodologies to bridge the gap between pre- silicon and post - silicon data VF and Vmin. + Develop automation to ... to amplify human inventiveness and intelligence. We are seeking an innovative senior timing and VF Methodology engineer to develop pioneering timing sign-off… more
- NVIDIA (Santa Clara, CA)
- …design flow including RTL design, verification, logic synthesis, timing analysis, ECO, and post silicon debug. + Strong interpersonal skills and an excellent ... NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement...responsible for the micro-architecture and design implementation of GPU memory subsystem modules. + Make architectural trade-offs based on… more
- NVIDIA (Santa Clara, CA)
- …Knowledge of memory coherence and consistency models. + Experience with pre- silicon and post - silicon bring-up, including emulation, simulation, and early ... accelerate the next wave of artificial intelligence. We are looking for highly motivated Senior Architect to work on our GPU NVLink Fabric Networking team. You'll be… more
- NVIDIA (Santa Clara, CA)
- …innovations involving crafting creative solutions for DFT architecture, verification and post - silicon validation on some of the industry's most complex ... implementing state-of-the-art designs in test access mechanisms, IO BIST, memory BIST and scan compression. + In addition, you...we are making the right trade-offs + Experience in Silicon debug and bring-up on the ATE with an… more
- Tarana Wireless (Milpitas, CA)
- …with embedded software development + Experience with emulation platforms + Experience with post silicon bringup The salary range for this position is: $130,000 ... This position will challenge you! The Senior ASIC Engineer will work on complex ASIC...of large ASIC designs including: Integration of Processors, Bus, Memory , and Interface IPs + Chip level integration and… more