- Capgemini Government Solutions (San Francisco, CA)
- Capgemini Government Solutions (CGS) LLC is seeking highly motivated and experienced Senior Cyber Security Engineer to join our team to support our government ... clients. The Senior Cybersecurity Engineer responsibilities include conducting full development lifecycle...ones need to be developed Implement and maintain standard methodology security controls on Windows and Linux server platforms… more
- NVIDIA (Santa Clara, CA)
- …our team with varied strengths today! What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. + ... includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips. + Participate in developing… more
- NVIDIA (Santa Clara, CA)
- …aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most ... human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive...sophisticated strategies of signing off timing in design for world-class silicon performance. + Develop tools, and… more
- NVIDIA (Santa Clara, CA)
- …EDA tools from Synopsys (DC/FC), Cadence (Genus/Innovus) + Strong understanding of physical design implementation eg: physical synthesis, placement, routing, ... We are looking for a Senior CPU Implementation Methodology Engineer to...out from the crowd: + Prior CPU experience in physical implementation methodology + Proficiency in Perl,… more
- NVIDIA (Santa Clara, CA)
- …+ Engage with EDA providers on 3D-IC EDA feature requirements and 3D-IC design methodology . + Design optimization of 3D advanced silicon/package ... 3D-IC Test Chips validation of 3D-IC technology platforms and design methodology . What we need to see:...Familiarity with Machine Learning/Deep Learning + Experience in other Physical Design methodologies such as P&R, DFT,… more
- NVIDIA (Santa Clara, CA)
- … needs to balance high frequency clocks with power, DFT, noise, circuit and physical design constraints. What you'll be doing: + Develop Clock RTL generation ... Methodology engineer with proven experience in high-speed logic design and verification. In order to support high frequency...solutions for supporting high speed Clocking. + Understand the physical aspects of the chip and develop better clock… more
- NVIDIA (Santa Clara, CA)
- …into a single chip. Your role will be cross-disciplinary, working with software, ASIC design , verification, physical design , VLSI and platform teams. Our SoC ... We are now looking for a Senior Hardware SoC Architect for our Tegra team!...+ Hardware architecture end-to-end lifecycle ownership. + Drive Architecture/Software/Hardware co- design and collaboration on features set. + Perform performance,… more
- Stanford University (Stanford, CA)
- …and interpersonal skills will be crucial to success. The chief of data analytics, methodology and integration will be required to: design , develop, optimize, and ... Chief of Data Analytics, Methodology , and Integration **Hoover Institution, Stanford, California, United...integrity of the US research enterprise. This is a senior -level role for a versatile individual with proven leadership… more
- NVIDIA (Santa Clara, CA)
- …to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you ... intelligence. What you'll be doing: + Drive next generation physical design work to achieve best in...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- Microsoft Corporation (Mountain View, CA)
- …engineer to join our Central Analog Computer-Aided Desing (CAD) Tools, Flows and Methodology (TFM) group leading physical verification across a multitude of ... cutting-edge silicon solutions for Microsoft. We are seeking a ** Senior Analog Computer-Aided Design Engineer** to join...with the central CAD organization as well as across design teams to align roadmap for physical … more
- Qualcomm (Santa Clara, CA)
- …you will be working with WiFi (802.11x) technology and employ best-in-class verification methodology . You will have a great opportunity to work on all cutting- edge ... Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR...systems modelling language proficiency is a plus - WIFI Physical layer knowledge is a plus **Principal Duties &… more
- Capgemini (Santa Clara, CA)
- …and Create verification environments using System-Verilog and Universal verification methodology -UVM IPs and SoCs with embedded CPUs and analog mixed-signal ... and Gate simulations and resolve them by working with design engineers. * Create low power testcases using UPF...digital and software to support the convergence of the physical and digital worlds. Coupled with the capabilities of… more
- Global Foundries (Santa Clara, CA)
- …teams involved. Essential Responsibilities: + Knowledge of SoCs, digital and AMS design methodology , Foundation IPs, IC manufacturing and process technology + ... is a leading full-service semiconductor foundry providing a unique combination of design , development, and fabrication services to some of the world's most inspired… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. What you'll be doing: + You will drive physical design of high-frequency and low-power CPUs, GPUs, SoCs at block ... We are now looking for a motivated Senior ASIC Engineer, Timing to join our dynamic...quality checks, etc. + Help in all aspects of physical design , such as driving timing convergence,… more
- JPMorgan Chase (Palo Alto, CA)
- … design -led transformation team and help us reimagine the customer experience. As a Senior UX Researcher in our design -led transformation team, you will use ... Design Thinking methodology to develop empathy for our product's users. You...practices and beliefs, as well as mental health or physical disability needs. Visit our FAQs for more information… more
- Siemens Digital Industries Software (Fremont, CA)
- …IC EDA tools and design methods including: o ASIC design methodology from RTL Synthesis to Physical Implementation phases o RTL Design /Verification, ... leading EDA and MCAD tools that facilitate the architectural planning, physical design /verification, muti-die based electrical, thermal, mechanical stress… more
- Microsoft Corporation (Santa Clara, CA)
- …(DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a ** Senior Silicon Engineer** . You will join our front-end silicon team and be ... Integrated Circuit (ASIC) System on Chip (SOC) using Universal Verification Methodology (UVM)/C test bench + Perform Pre-Silicon SoC verification, Post-Silicon/… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Lucile Packard Children's Hospital Stanford (Palo Alto, CA)
- …range of hospitals throughout the greater Bay Area, and beyond. As the Senior Associate Dean for Maternal and Child Health, partners with the Chief Administrative ... and to provide highest quality of education and care. The Chief Medical Officer/ Senior Associated Dean will play a key role in strategic planning, program… more
- Microsoft Corporation (San Jose, CA)
- We are looking for a ** Senior Systems Engineer** to join the team. As a Systems Engineering team member, you will work directly with engineers across ... will include interacting directly with Microsoft's cloud services teams, cross-discipline design teams focusing on the functional interfaces and developing test… more
