• ASIC Design Efficiency

    NVIDIA (Santa Clara, CA)
    We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and ... to extend the state of the art performance and efficiency . + Understand the design and implementation,...art performance and efficiency . + Understand the design and implementation, develop methodology and infrastructure to drive… more
    NVIDIA (06/15/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design ...expertise to identify and implement improvements in the current design flow and methodologies to improve efficiency more
    NVIDIA (03/20/25)
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  • ASIC Silicon Infrastructure Engineer

    Meta (Sunnyvale, CA)
    …efficient System on Chip (SoC) and IP for our AR/MR products. We manage our ASIC design environment, develop methodologies and craft tools to streamline the ... **Summary:** META is hiring ASIC Silicon Infrastructure Engineer within our...with internal infrastructure team on adapting Meta infrastructure/tooling to ASIC design solutions, including but not limited… more
    Meta (05/02/25)
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  • ASIC Rtl Design Engineer

    Google (Sunnyvale, CA)
    …hardware experiences, delivering unparalleled performance, efficiency , and integration. As a Design Engineer , you will play an important role in designing ... + 5 years of experience in Application-specific integrated circuit ( ASIC ) design . + Experience working on interconnects...use Google services around the world. We prioritize security, efficiency , and reliability across everything we do - from… more
    Google (05/06/25)
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  • ASIC Design Verification…

    Qualcomm (Santa Clara, CA)
    …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and… more
    Qualcomm (04/09/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... Systems design . + A deep understanding of ASIC design flow including RTL design...virtual channels. + Interest or have prior experience in efficiency enhancement, such as, flow development and code generator.… more
    NVIDIA (05/02/25)
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  • ASIC Physical Design Engineer

    Google (Sunnyvale, CA)
    …and its integration within AI/ML-driven systems. As an Application-Specific Integrated Circuit ( ASIC ) Physical Design Engineer on the Chip Implementation ... practical experience. + 3 years of experience in physical design and methodologies. + Experience with place and route...use Google services around the world. We prioritize security, efficiency , and reliability across everything we do - from… more
    Google (05/19/25)
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  • ASIC Methodology/CAD Engineer

    Amazon (Sunnyvale, CA)
    …robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design flows that improve the efficiency ... and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows...responsibilities - Develop automated flows for improving the SoC design process - Build robust, scalable tools that help… more
    Amazon (06/11/25)
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  • Senior ASIC Design Verification…

    Google (Sunnyvale, CA)
    …at RTL using SystemVerilog for ASICs. + Experience in memory subsystem design verification. + Experience in Power aware verification, Gate level simulations, and ... Post silicon bring-up. + Familiarity with ASIC standard interfaces and memory system architecture. In this...behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs,… more
    Google (05/27/25)
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  • ASIC Engineer , IP Design

    Google (Mountain View, CA)
    …or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: + Master's degree or PhD in Electrical… more
    Google (06/14/25)
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  • Senior ASIC Power Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (04/23/25)
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  • Senior ASIC Front End Infrastructure…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
    NVIDIA (04/30/25)
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  • Senior Software Engineer , ASIC

    NVIDIA (Santa Clara, CA)
    …years of EDA tool development in the verification field + Hands on experience with ASIC design and verification + Good with C++ and other programming languages ... engineers on project verification support + Develop new methodologies to improve verification efficiency and capacity + Co-develop EDA tools with our vendors to best… more
    NVIDIA (05/02/25)
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  • ASIC Design Verification…

    Broadcom (San Jose, CA)
    …Ethernet solutions that deliver unprecedented performance at critically important power efficiency ._** **_We are looking for highly skilled and efficient Constrained ... Random Design Verification engineers that want to verify new designs...of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products.… more
    Broadcom (04/29/25)
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  • Senior E/E & Semiconductor Engineer

    Capgemini (San Francisco, CA)
    **Job Summary:** We are seeking a skilled CAD Infrastructure engineer to support our ASIC design team. The ideal candidate will be responsible for developing ... ensuring the efficiency and effectiveness of the ASIC design process, making it an integral...**Organization:** _ERD PPL US_ **Title:** _Senior E/E & Semiconductor Engineer - CAD/EDA - Silicon Design /Verification Infrastructure… more
    Capgemini (05/02/25)
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  • Sr.Staff SoC Lead design verification…

    Qualcomm (Santa Clara, CA)
    …Summary:** As a Design Verification Lead, you will lead a team of ASIC design verification engineers to verify IP and Subsystems that be integrated in ... and emulation strategies) to continuously push the quality and efficiency of test benches + Act as a technical...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
    Qualcomm (04/04/25)
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  • ASICS Design Verification Engineer

    Qualcomm (Santa Clara, CA)
    …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
    Qualcomm (06/06/25)
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  • Digital Design Engineer

    Meta (Sunnyvale, CA)
    …accelerators and state-of-the-art SoCs. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital uArchitecture and ... architecture, firmware, and algorithms.We are growing our Machine Learning ASIC Design and uArchitecture team within RL...experience. 7. 5+ years of experience as a Hardware Design Engineer for production silicon shipped in… more
    Meta (04/02/25)
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  • SoC RTL Security Design Engineer

    Google (Sunnyvale, CA)
    …experiences, delivering unparalleled performance, efficiency , and integration. As a SoC Design Engineer , you will join a team working on SoC-level RTL ... on computer architecture. + 10 years of experience in ASIC design with 3 years of experience...use Google services around the world. We prioritize security, efficiency , and reliability across everything we do - from… more
    Google (06/05/25)
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  • Sr S/I Engineer (Hardware)

    Palo Alto Networks (Santa Clara, CA)
    …to validate critical interfaces. Within the Hardware team, you collaborate closely with Board Design , ASIC Design , PCB Layout, and Validation Test. You will ... Component Engineers. **Your Impact** + Collaborate with a cross-functional team including: ASIC , Board design , PCB layout, Operations supply base management,… more
    Palo Alto Networks (05/03/25)
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