- Google (Sunnyvale, CA)
- …subsystem design architecture and microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC /SoC products according to ... of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing… more
- Broadcom (San Jose, CA)
- …We are seeking for an experienced RTL Designer for our team. The engineer will be responsible for design & development of digital circuits including defining ... experience is a plus. + Experience in micro-architecture and RTL development. + Worked on architecture definitions on clocks,...in Tcl, Perl, Python scripting + Good understanding of ASIC design flow + Strong interpersonal skills… more
- Amazon (Cupertino, CA)
- …for in the United States. In Annapurna Labs we are at the forefront of hardware co- design not just in Amazon Web Services (AWS) but across the industry. The work we ... while also being deeply important to our customers. We design and build every component of our hardware and...the future with us! Responsibilities: * Participate in logic design activities as part of Amazon's machine learning custom… more
- Google (Sunnyvale, CA)
- …the security subsystem's design microarchitecture specifications. + Develop SystemVerilog RTL to implement logic for ASIC products according to established ... on computer architecture. + 10 years of experience in ASIC design with 3 years of experience...delivering unparalleled performance, efficiency, and integration. As a SoC Design Engineer , you will join a team… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our ... / flow experience + Fundamental digital design concepts and experience in ASIC design flow including RTL design , verification, logic synthesis and… more
- Palo Alto Networks (Santa Clara, CA)
- …less experienced team members. This role requires a deep technical background in ASIC design for networking applications and the ability to independently drive ... junior and senior staff engineers, providing technical guidance and fostering their growth in ASIC design best practices, particularly in areas like design … more
- Meta (Sunnyvale, CA)
- …Area. 12. Knowledge of front-end and back-end ASIC tools. 13. Experience with RTL design using SystemVerilog or other HDL. 14. Experience managing multiple ... (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1....Synthesis & Integration Engineer 11. Experience with RTL Synthesis and design optimization for Power,… more
- Amazon (Cupertino, CA)
- …massive scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and ... signal routing - As a key member of the ASIC design team, you will implement and...Engineering or related technical field - 5+ years in RTL design for SOC - 5+ years… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... & bus protocols, interconnect networks and/or caches. + Great understanding of ASIC design flow including RTL design , verification, logic synthesis… more
- Tarana Wireless (Milpitas, CA)
- This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + Architecture ... and micro-architecture of digital subsystems + RTL design of digital circuits using Verilog...design of digital circuits using Verilog + Frontend design development and integration of large ASIC … more
- SpaceX (Sunnyvale, CA)
- Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON...drive architectural feasibility studies, develop timing, power and area design targets, and explore RTL / design … more
- Meta (Sunnyvale, CA)
- …PLL, etc) 12. Knowledge of front-end ASIC flows 13. Experience with RTL design using SystemVerilog or other HDL. 14. Experience with communicating across ... on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat… more
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our...to improve performance and power 5. Work with the RTL design team to understand partition architecture… more
- Amazon (Cupertino, CA)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...area and power-efficient RTL designs to meet project specifications and targets *… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... our prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design . You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis, static timing...have strong UNIX-based EDA tool skills and knowledge of ASIC design flows. Must be familiar with… more
- Qualcomm (Santa Clara, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and...and methodology + 3+ years of experience with digital design concepts and RTL languages such as… more
- Google (Mountain View, CA)
- …related field, or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with ... like Python or Perl. + Experience with ARM-based SoCs, interconnects and ASIC methodology. Preferred qualifications: + Master's degree or PhD in Electrical… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... Engineering + 5+ years of meaningful experience in SOC architecture and design experience. + Experience in micro-architecture and RTL development (Verilog).… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to ...Systems design . + A deep understanding of ASIC design flow including RTL ... be doing: + As a key member of our design team, you will be responsible for the micro-architecture...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more