- Broadcom (San Jose, CA)
- …and develop scalable and reusable Testbench environment using the framework of Verification Methodologies. . Drive Test plans for all features for Block/Core/SOC and ... and get to full Functional coverage and bring the Verification to closure . Debug Regression failures, analyze Functional...in an efficient way. . Lead the documentation of verification strategy including Test plans, Verification Environment,… more
- Broadcom (San Jose, CA)
- …Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology . Build pseudo-random tests to verify and get to full ... Coverage gaps and improve tests to cover the gaps . Document verification strategy including Test plans, Verification Environment, pseudo-random tests, etc.… more
- SpaceX (Sunnyvale, CA)
- Sr. IC Layout Engineer (Starlink) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the stars is ... this possible, with the ultimate goal of enabling human life on Mars. SR. IC LAYOUT ENGINEER (STARLINK) At SpaceX we're leveraging our experience in building… more
- Applied Materials (Santa Clara, CA)
- …Visit our Careers website to learn more about careers at Applied. The Photonic IC Design Engineer is responsible for the design of high-speed photonic ICs; ... supporting Product Marketing with the Product Roadmap. The Photonic IC Design Engineer is a trusted partner...to co-design and fabricate PICs + Carry on Design Verification Tests (DVT). Write technical reports. **Functional Knowledge** +… more
- Power Integrations (San Jose, CA)
- …and power density. We are seeking a highly motivated Sr. Staff CAD Engineer to join our dynamic engineering team in capitalizing on this market transformation. ... Duties and Responsibilities + Develops and maintains PDKs. + Supports all IC design CAD tools such as Cadence schematic entry, mixed mode circuit simulation, layout… more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom Inc. is looking for a creative and self motivated Digital IC Design Engineer to join the Data Center Solutions Group . This ... integrating third-party IP. * Working with cross functional teams such as Verification , Firmware and Systems Engineering to deliver detailed testing strategies and… more
- Broadcom (San Jose, CA)
- …with custom routing for high speed interfaces, bump map design , routing and physical verification and tapeout to the foundries. As part of your job you will be ... (3DIC compiler), Mentor Graphics (Calibre) for layout generation, editing and verification + Strong understanding of TSV design, micro-bumps, solder bumps, and… more
- Qualcomm (Santa Clara, CA)
- …for wireless products (eg, LNA's, PLL's) and 4+ years of ASIC design, verification , or related work experience. OR Master's degree in Electrical Engineering or ... related field and 4+ years of ASIC design, verification , or related work experience. OR PhD in Electrical...or related field and 2+ years of ASIC design, verification , or related work experience. * 2+ years of… more
- Broadcom (San Jose, CA)
- …Candidate Account, please Sign-In before you apply.** **Job Description:** R&D Engineer position available in design and physical implementation of high performance ... Familiarity with VLSI design tools for Place&Route, Verilog simulation, DRC/LVS verification , Timing analysis (STA), Scripting languages - Tcl?Perl/ Python +… more
- Broadcom (San Jose, CA)
- …signal circuits subject to multiple constraints + Debug LVS/DRC/ERC errors with verification tool + Collaborate with design and layout engineers to optimize layout ... Work with CAD, packaging and foundry teams in resolving layout and / or verification issues + Experience required on technologies: 40nm, 16nm / 7nm FinFet -Knowledge… more
- Siemens (Fremont, CA)
- …This Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based ... across a range of areas from application engineering support and management, verification and validation of complex semiconductor ICs, system testing, and beyond? If… more
- Siemens (Fremont, CA)
- …This Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based ... who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and HVL, as well… more
- Power Integrations (San Jose, CA)
- The role of the Principal Product Definition Engineer is to analyze customer requirements, create full application solutions and specify new integrated circuits ... In the process of specifying new integrated circuits, the Senior Systems Engineer will use advanced simulation techniques to develop algorithms and prototype… more
- Capgemini (Santa Clara, CA)
- …the job you're considering** We are seeking a Senior Analog Layout Design Engineer with deep expertise in advanced CMOS FinFET technologies (TSMC 7nm, 5nm, 3nm). ... The ideal candidate will collaborate with circuit and verification teams to align layout with functional and performance...drivers, data converters, SerDes, and PLLs. + Manage complex IC layouts at block and chip levels using advanced… more
- Power Integrations (San Jose, CA)
- Job Description: The Senior Failure Analysis Engineer will perform power supply or system level failure analysis to support RMA and internal/external customer ... include, but are not limited to, the following. + Debugging and functionality verification of AC/DC switching power supply modules in various topologies using Power… more
- Skyworks (Milpitas, CA)
- …Requisition ID: 75426 Description Seeking a highly technical and motivated Sr. RF Engineer for IC product development, manufacturing, and support, for receivers ... Sr RF Engineer Apply now " Date:Jun 6, 2025 Location:...teams and is responsible for the design, analysis, simulation, verification , documentation, support, and release to production of RF… more
- Siemens (Fremont, CA)
- …of 8 years of experience in IC design, either as a CAD or Design Engineer , or working with EDA tools. + Strong expertise in creating Place & Route test cases and ... enable companies around the world to develop new and highly innovative electronic IC products faster and more cost-effectively. Our customers are engineers who use… more
- Capgemini (San Jose, CA)
- **Job description:** **Senior Analog Layout Engineer ** will be responsible for layout of high-performance analog cores such as analog-to-digital converters, ... digital-to-analog converters, PLL, transceivers, etc. Responsibilities include leading IC layout of cutting-edge high-performance, high-speed CMOS integrated circuits… more
- Qualcomm (Santa Clara, CA)
- …help create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... variety of signal and power integrity tasks and collaborate with package and IC designers to optimize the overall package design, including: + Utilizing experience… more
- NVIDIA (Santa Clara, CA)
- …in CMOS Analog / Mixed Signal Circuit Design + Skilled using design and verification tools (Cadence's IC design environment, analog circuit simulation tools like ... We are looking for an Engineer to verify the design and implementation of...doing: + As a key member of our circuit verification team, you will verify the design and implementation… more