- Two95 International Inc. (Sunnyvale, CA)
- Hi, Title: Lead / Senior Verification engineer Location: San Jose, CA / Santa Clara, CA Duration: 6+ Months Rate: $Open Skills: UVM and System Verilog ... of proven experience on ASIC / SoC / IP Verification . * Strong experience in SystemVerilog and UVM ...Verification . * Strong experience in SystemVerilog and UVM verification methodologies * Proficiency in Object Oriented programming, computer… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer for our Coherent High Speed Interconnect team! For two decades, we have pioneered visual ... most sophisticated problems in everyday life. As a ASIC Verification Engineer at NVIDIA, you will verify...programming language experience, scripting ability and an expertise in System Verilog. + Exposure to design and verification… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification . The NVIDIA Clocks ... Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System ...art verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Verification Engineer ! NVIDIA is seeking an outstanding engineer to verify the design and implementation of the ... + 5+ years of relevant work experience + Proficiency in verification languages ( System Verilog or equivalent) and methodologies (UVM or equivalent) + Experience… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Senior System Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for ... + Be familiar with hierarchical design approach, top-down design, SoC and system level verification . + Candidates will be working on-site at our Santa Clara, CA… more
- Amazon (Sunnyvale, CA)
- Description As a Senior Design Verification (DV) Engineer , you will be part of an advanced architecture team that is exploring new hardware designs to ... EE, CE, or CS - 7 years or more of practical semiconductor design verification experience including System Verilog, UVM, assertions and coverage driven … more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... choice to join our diverse team today! As a Senior Digital Design Verification Engineer ...least 5 years of validated experience. + Background in verification at Unit/Sub- system /SOC level and expertise in… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking a hardworking Senior ASIC Design Verification Engineer to help drive sign-off strategies for world's leading GPUs and SoCs. This position ... voltage regulation and silicon correlation. + Own the unit and sub- system level verification of various IPs, create functional test plans, and verify using… more
- NVIDIA (Santa Clara, CA)
- …teammate are huge plus + Experience in crafting test bench environments for unit and system level verification NVIDIA is widely considered to be one of the ... NVIDIA is seeking elite ASIC Verification Engineers to verify the design and implementation...tools, debug tools like Debussy, GDB) + Expertise in System Verilog or similar HVL + You display strong… more
- Amazon (Sunnyvale, CA)
- …Fire TV and Amazon Echo. What will you help us create? As a Sr. Design Verification Engineer at Amazon, you will be part of an advanced engineering and research ... development environments, fluency in modern hardware description languages and verification methodologies. They should have experience verifying complex IP blocks… more
- NVIDIA (Santa Clara, CA)
- …verify the world's leading GPUs. In this role, you will be doing unit level verification of the process scheduling and system interface hardware of the GPU. This ... the design are verifiable + Architect and plan the verification strategy and execution for sub- system features...plan the verification strategy and execution for sub- system features impacting your unit + Support post-silicon validation… more
- Tarana Wireless (Milpitas, CA)
- …Sight connections. What you'll be doing: + Work with some of the best DSP, system , and software engineers to define verification strategies and execute plans at ... or full chip level + Build and continuously improve verification infrastructure and methodologies to meet the demands of...the demands of next generation SoCs + Work with system architects, RTL designers, FPGA and emulation engineers to… more
- Qualcomm (Santa Clara, CA)
- …the moderately-defined responsibility for the development of test plans and the functional verification on hardware at the IP, sub- system , SoC and system ... /architecture level for wireless and wired technologies using an object-oriented verification language called SystemVerilog in an OVM or UVM verification … more
- quadric.io, Inc (Burlingame, CA)
- …variety of edge and endpoint devices, ranging from battery operated smart-sensor systems to high-performance automotive or autonomous vehicle systems . Unlike ... Collaborate with architects, HW & SW designers to document verification test plans + Implement testbenches using commercial VIPs...Use coverage metrics to track and communicate progress on verification Requirements + At least 5 years of experience… more
- Palo Alto Networks (Santa Clara, CA)
- …to create an environment where we all win with precision. **Your Career** As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in ... requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage,… more
- Google (Sunnyvale, CA)
- …at RTL using SystemVerilog for ASICs. + Experience in memory subsystem design verification . + Experience in Power aware verification , Gate level simulations, and ... bring-up. + Familiarity with ASIC standard interfaces and memory system architecture. In this role, you'll work to shape...loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a… more
- SpaceX (Sunnyvale, CA)
- …extended hours and weekends as needed COMPENSATION & BENEFITS: Pay range: Design Verification Engineer / Senior : $170,000.00 - $230,000.00/per year Your ... Sr. Design Verification Engineer (Silicon Engineering) Sunnyvale, CA...engineer who will work alongside world-class cross-disciplinary teams ( systems , firmware, architecture, design, validation, product engineering, ASIC implementation).… more
- Abbott (Pleasanton, CA)
- …life for our heart failure patients. The Staff Systems Verification Engineer will be accountable for delivering system verification across the full ... people in more than 160 countries. **Job Title** **Staff Systems Verification Engineer ** **Working at...8+ years of experience in a similar position, including system verification and validation, systems … more
- City and County of San Francisco (San Francisco, CA)
- …in the minimum qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer - Security Specialty are ... together as an enterprise networking backbone. The 1043 Senior Security Engineer is the advanced journey...the work than lower level classifications. Serves as a senior technical architect and systems integrator for… more
- City and County of San Francisco (San Francisco, CA)
- …integrate these systems together as an enterprise networking backbone or platform. The 1043 Senior Systems Engineer is the advanced journey level in the ... qualifications. Application Deadline: Continuous How to Apply: Applications for Senior Information Systems Engineer -...Knowledge of antivirus software (eg, McAfee) * Knowledge of systems security & ability to implement system … more