- APPLIED MATERIALS (Santa Clara, CA)
- …Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design.Identify and execute continuous improvement ... Materials and its Supply Base.Provide advanced training and support to Packaging Engineer III.Performs other duties as assigned. Duties will vary according to the… more
- SanDisk (Milpitas, CA)
- …forward. **Job Description** We are looking for an experienced **Digital Physical Design Engineer ** to work whole digital SPR flow from RTL to GDS, include ... Synthesis, DFT scan insertion, PNR, STA timing analysis, IRdrop power...PT, StarRC ESSENTIAL DUTIES AND RESPONSIBILITIES: + **Synthesis and DFT scan insertion** + Familiar timing constraint and qualify,… more
- SanDisk (Milpitas, CA)
- …you'll be at the center of innovation. We are looking for an experienced Principal Engineer to lead and deliver projects for our Memory Design team. This is a great ... RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT , timing analysis and closure + Balance design trade-offs with modularity,… more
- SanDisk (Milpitas, CA)
- …you'll be at the center of innovation. We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory Design team. This is a great ... RTL linting, clock domain crossing (CDC) analysis, design integration, synthesis, DFT , timing analysis and closure + Balance design trade-offs with modularity,… more
- SanDisk (Milpitas, CA)
- …keep our world moving forward. **Job Description** We are seeking a Senior Engineer , Product Development Engineering to join our innovative team in Milpitas, United ... yield improvement efforts with appropriate functional owners; + Driving DFT techniques and implementing automation solutions where possible **Qualifications**… more
- Ayar Labs (San Jose, CA)
- Engineer - ASIC Design Verification Location: San Jose (this is an on-site position) Summary: This role is responsible for pre-Si verification and validation of ... and on-chip interconnects Design and contribute to design for test ( DFT ) methodologies Basic Qualifications: BS, MS in Electrical Engineering, Computer Engineering… more
- Broadcom (San Jose, CA)
- …a Candidate Account, please Sign-In before you apply.** **Job Description:** **Principal DFT Engineer ** Broadcom's ASIC Product Division is seeking candidates ... for a DFT position at our San Jose, California Development Center....Center. The successful candidate will be responsible for leading DFT programs all the way from chip level … more
- Broadcom (San Jose, CA)
- …please Sign-In before you apply.** **Job Description:** Broadcom is looking for highly qualified DFT engineer . In this role you will be contributing to the ... Computer Engineering with 6+ years of experience in ASIC DFT development for serial high-speed data center networking. +...serial high-speed data center networking. + Experience as a DFT architect for chip and block level IPs. +… more
- NVIDIA (Santa Clara, CA)
- …diverse team today. We are now looking for a highly motivated and talented Senior DFT Infrastructure Engineer to join our DFX group to join this multifaceted and ... tools for ATE test vector release and fail analysis/diagnosis flows + Work with DFT , ATE bringup, Silicon FA teams + Create regression testcases to ensure flow… more
- Cisco (San Jose, CA)
- Product Test Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1444752) + Location:San Jose, California, US + Area of InterestSupply Chain + Compensation ... in Silicon Operations, and with Cisco Systems NPI teams. Collaborate with DFT , Reliability, Quality, Failure Analysis and Manufacturing teams to resolve silicon… more
- NVIDIA (Santa Clara, CA)
- …methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you are problem solver and ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior DFX Software Engineer - Machine Learning. Do you like to think creatively and enjoy solving challenges that require innovation? If ... EDA solution. + Expertise in high performance algorithms for DFT , simulations, and failure analysis. + Understanding of different...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** Broadcom is seeking a highly motivated **Test Engineer ** to join our Semiconductor Test Engineering team. In this role, you ... analyze results to drive yield and performance improvements. + Work with ** DFT , design, and product engineering teams** to define test requirements, improve test… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. We are now looking for a motivated Senior ASIC Test Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Palo Alto Networks (Santa Clara, CA)
- …capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test platforms for network ... for test coverage and serviceability with ICT and boundary scan + Drive DfT (Design for Testability) and test coverage analyses from early Prototype design stages… more
- NVIDIA (Santa Clara, CA)
- …position within a top-tier organization? In the role of Silicon Product Development Engineer at NVIDIA, you will be instrumental in launching our brand new Data ... ASIC Mixed Signal design, characterization, and qualification of BIST and SCAN DFT methodologies. + Knowledgeable in advanced Silicon Process technology such as… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit Solutions Group! NVIDIA has continuously ... + Work with front-end teams to overlook correctness of the design (Lint/NA/CDC/Synthesis/ DFT /LEC/STA) + Partner and work with back-end team until chip tape-out. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- Applied Materials (Santa Clara, CA)
- …Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design. Identify and execute continuous ... Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary according to the… more
- NVIDIA (Santa Clara, CA)
- …in AI and computing. What you'll be doing: As a Reliability Methodology Engineer at NVIDIA, you will be responsible for ensuring our products and systems ... + Collaborate with design, product, and test engineering teams to apply DFT methodologies to improve reliability screening specific to HTOL (Component level Hight… more
