- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) - PPA Fusion ... technology-focused company. What you will be doing: + Developing Efficient physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. NVIDIA is looking for best-in-class Senior Physical Design Methodology Engineer (s) to join our ... impact in a technology-focused company. What you will be doing: + Developing physical design methodologies for implementation of graphics processors and SOCs. +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. What you will be doing: + Developing innovative physical design methodologies for implementation of GPU, CPU and SOCs, with ... PPA (Power, Performance, Area) and runtime improvement of the physical design flow on advanced technology nodes...with internal and external partners to drive tool and methodology improvements to deliver best-in-class PPA solutions across all… more
- NVIDIA (Santa Clara, CA)
- …make a lasting impact on the world! We are currently looking for a Sr VLSI Physical Verification Methodology Engineer . What you'll be doing: + Developing ... years in physical verification. + Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and… more
- NVIDIA (Santa Clara, CA)
- …amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's ... aging, self-heating, thermal impact, IR drop etc. + Collaborate with technology leads, VLSI physical design , and timing engineers to define and deploy the most… more
- Capgemini (San Jose, CA)
- **About the job you're considering** We are seeking a Python Methodology Engineer to develop Python scripts that automate the setup, execution, and monitoring of ... by Capgemini. **Job:** _Developer_ **Organization:** _ERD PPL US_ **Title:** _Python Methodology Engineer / Post Silicon Validation_ **Location:** _CA-San Jose_… more
- NVIDIA (Santa Clara, CA)
- …on the world. We are now looking for a Senior Power Integrity Methodology Engineer . What you'll be doing: + Developing physical design methodologies for ... or related field. + Minimum 5+ years of experience in IR/EM/Thermal flow methodology development and support. + Strong understanding of all aspects of IR/EM/thermal… more
- NVIDIA (Santa Clara, CA)
- …our diverse team today! The Advanced Technology Group is looking for a highly motivated Principal Physical Design Engineer to join our group. Do you have a ... proven EE background with an in-depth understanding of physical design , place and route, timing analysis,...be doing: + Lead the Advanced technology node P&R methodology architecture and development + Advanced technology node test… more
- Broadcom (San Jose, CA)
- …before you apply.** **Job Description:** **Broadcom is looking for a senior level ASIC physical design engineer . In this highly visible role, you will ... and high speed clock constraints and specification.** + **Good understanding of physical design verification methodology to debug LVS/DRC issues at the chip… more
- NVIDIA (Santa Clara, CA)
- …timing paths through ECOs including crosstalk and noise analysis. + Expertise in physical design and optimization eg, placement, routing, cell sizing, buffering, ... We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If...experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS… more
- Cisco (San Jose, CA)
- Senior Analog/mixed-signal IC Design Engineer - Acacia Apply (https://jobs.cisco.com/jobs/Login?projectId=1443040) + Location:San Jose, California, US + ... peer review of complex IC designs and provide solid design methodology from conception to production. +...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- NVIDIA (Santa Clara, CA)
- …the ASIC team to drive design methodology to continuously improve design quality and engineer efficiency, including leveraging best in class AI tools and ... We are now looking for a Senior Video ASIC Design Engineer ! NVIDIA has been transforming computer...timing, and area optimization, static checks, and support of physical design engineers through place and route.… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Circuit Design Engineer ! NVIDIA stands at the intersection of hardware excellence and AI breakthrough, where every line of code ... clocking, and power management solutions. + You'll drive the design and physical implementation of custom digital...layout delivery. + Integrate AI/ML techniques directly into the design process and methodology . + Be a… more
- NVIDIA (Santa Clara, CA)
- …spec + Lead and influence other layout designers to improve team efficiency and align design methodology What we need to see: + Associates degree (or equivalent ... We are looking for you! You'll work on the design and development of our next generation custom SRAM...the NVIDIA products! What you'll be doing: + Perform physical layout for custom embedded SRAM structures in state-of-the-art… more
- NVIDIA (Santa Clara, CA)
- …for NVIDIA's front-end ASIC software including RTL synthesis, equivalence checking, and early physical design and methodology for all of NVIDIA's ... Be part of a diverse team creating NVIDIA's chip design methodology ! These chips are among the...the crowd: + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Experience… more
- NVIDIA (Santa Clara, CA)
- …or Computer Engineering or equivalent experience. + 8+ years experience in Physical design /Timing. + Experience in full-chip/sub-chip Static Timing Analysis ... as part of the advanced technology team to optimize design tradeoffs and methodology on next generation...of multiplexed scan logic and constraints. + Expertise in physical design , optimization, and ECO implementation eg… more
- Skyworks (San Jose, CA)
- …valuable inputs directly translate into new ways of solving common problems, improved design methodology , or enhanced business culture or the work environment. ... and highly competitive cellular handset market. + As a Multi-Chip Module Design Engineer , you will be responsible for developing next-generation, highly… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design ... of Python, Perl , Tcl, C/C++ + Knowledge or experience with logic synthesis, physical design , formal equivalence checking. + Proven track record developing flows… more
- Palo Alto Networks (Santa Clara, CA)
- …efficiency to boost the testing team's productivity. * Apply a consistent test design methodology when developing testing automation. * Design , develop, ... what's possible in cybersecurity. As a Sr Staff SDET Engineer , you'll play a critical role in our mission...production issues and develop improvement plans. * Drive test design and strategy for high-impact and priority features. *… more