- Cisco (San Jose, CA)
- ASIC Physical Design Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1435075) + Location:San Jose, California, US + Area of ... ASICs being developed in the industry. **Your Impact** You'll be joining our Physical Design team at **Cisco Silicon One** group, which is responsible for the… more
- Cisco (San Jose, CA)
- ASIC Design Technical Leader - ...in refining design and timing constraints for seamless physical design closure. As part of this team, ... provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco... team who oversees fullchip SDCs and works with physical design and DFT teams to close… more
- Cisco (San Jose, CA)
- Technical Leader ASIC Design - Prototyping Apply (https://jobs.cisco.com/jobs/Login?projectId=1439389) + Location:San Jose, California, US + Area of ... are received. Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets...+ Be part of the development organization as an ASIC Engineering Technical Leader with primary focus… more
- Cisco (San Jose, CA)
- ASIC Engineering Technical Leader ( Design ) Apply (https://jobs.cisco.com/jobs/Login?projectId=1437840) + Location:San Jose, California, US + Area of ... + Bachelor's degree in Electrical or Computer engineering and 8+ years of ASIC Design experience. + Experience with Verilog and System Verilog programming.… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization. We are looking for individuals with experience in backend ... efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer, Physical Design Responsibilities: 1. Develop and own … more
- Palo Alto Networks (Santa Clara, CA)
- …provide technical leadership, collaborate extensively with world-class verification and physical design engineers to hit aggressive performance, power, and ... less experienced team members. This role requires a deep technical background in ASIC design ...add design -for-debug features. + **Collaborate** effectively with physical design teams, including reviewing synthesis/timing reports,… more
- SanDisk (Milpitas, CA)
- …seamless integration of ASIC designs into larger systems + Conduct thorough design reviews and provide technical leadership to junior engineers + Analyze and ... development + Contribute to the development of best practices and methodologies for ASIC design within the organization + Optimize designs for power efficiency,… more
- Cisco (San Jose, CA)
- …and be responsible for ASIC bring up **Minimum Qualifications:** + 10+ years ASIC design verification experience with a bachelor's or master's degree + Prior ... ASIC Engineering Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1430129)...for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers… more
- Palo Alto Networks (Santa Clara, CA)
- …for networking IP and backend + Technical expertise on the entire ASIC design flow-architecture, logic design , RTL coding, verification, FPGA validation, ... synthesis, DFT, timing closure and physical backend leading to tape-out + Education/Training - BSEE/MSEE...10+ year industrial experience + Minimum of 10 years ASIC design /verification and 5 years of … more
- Cisco (San Jose, CA)
- ASIC Engineering Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1438623) + Location:San Jose, California, US + Area of InterestEngineer - ... Engineering with at least 10 years of experience on ASIC chip design + Prior experience with...power how humans and technology work together across the physical and digital worlds. These solutions provide customers with… more
- Amazon (Cupertino, CA)
- …you - come build the future with us! Key job responsibilities * Perform physical design for Amazon's machine learning custom silicon solutions * Participate in ... various aspects of physical design : full chip floorplanning, circuit analysis,...PhD in Electrical Engineering or Computer Engineering Previous relevant technical internship experience Experience with FinFET design ,… more
- Meta (Sunnyvale, CA)
- …Emulation Engineers in supporting them with the handoff tasks. Interact with Physical Design Engineers and provide them with timing/congestion feedback **Minimum ... 12. Knowledge of SOC Integration (Clocking, Reset, PLL, etc) 13. Knowledge of front-end ASIC flows 14. Experience with RTL design using SystemVerilog or other… more
- Amazon (Sunnyvale, CA)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... semiconductor projects. This is an opportunity to shape the technical direction of critical IC design workflows...infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's… more
- Broadcom (San Jose, CA)
- …and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. + Participate in large complex design ... Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple disciplines including… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from -...leadership principles requirements for this role - Meets/exceeds Amazon's functional/ technical depth and complexity for this role Amazon is… more
- Qualcomm (Santa Clara, CA)
- …RF/Analog circuits for wireless products (eg, LNA's, PLL's) and 4+ years of ASIC design , verification, or related work experience. OR Master's degree in ... Electrical Engineering or related field and 4+ years of ASIC design , verification, or related work experience....with post silicon characterization. * 1+ year in a technical leadership role with or without direct reports (only… more
- Cisco (San Jose, CA)
- Physical Design Lead Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1436295) + Location:San Jose, California, US + Area of InterestEngineer - ... as per need for verification robustness. + Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with… more
- Meta (Sunnyvale, CA)
- … technical field, or equivalent practical experience 7. 8+ years of experience in ASIC Physical Design 8. Understanding of RTL2GDSII flow and design ... Machine Learning (ML) front-end and back-end hardware designers to drive the Physical design implementation of ML compute blocks in advanced technology nodes and… more
- Google (Sunnyvale, CA)
- …or a related field, or equivalent practical experience. + 10 years of experience in ASIC physical design and methodologies in advanced process nodes. + ... stack, including timing, PDV, EMIR, package concerns, and power. + Experience with custom physical design , which may include custom datapath design , standard… more
- Google (Sunnyvale, CA)
- …the domain of static timing analysis. + Experience leading one or more aspects of physical design or physical design flow/methodology, to successful ... within AI/ML-driven systems. In this role, you will work on the physical implementation of Application-specific integrated circuits ( ASIC ) using advanced… more