- DBSI Services, Inc. (Milpitas, CA)
- …401(k) 401(k) matching Relocation bonus Job Title: Front-End ASIC Design Engineer Job Description: Milpitas, CA Description Responsibilities Include but are not ... Architecture / micro-Architecture; Logic Design; RTL integration and coding; Lint/CDC/ DFT checks; Synthesis & supporting timing-closure; Contribute to and support… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a DFT Engineer you will work with chip architects, chip designers, implementation ... Qualcomm Technologies, Inc. **Job Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a leading technology innovator, Qualcomm… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …to make an impact on the world of technology. Job Title: Lead Application Engineer Location: Tampere, Finland Reports to: AE Director Job Overview: This Digital IC ... with Cadence EDA tools for Synthesis, Logical Equivalency Checking (LEC), Design-for-Test ( DFT ), Place & Route and Static Timing Analysis (STA).You may get involved… more
- NVIDIA (Santa Clara, CA)
- …Clocking. + Together with other team members, we deliver clock RTL information to GPU, CPU and SOC verification team, timing and DFT teams. + Get involved in ... The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible...is responsible for crafting all aspects of GPU and CPU clocking. The team collaborates with the front design… more
- Amazon (Sunnyvale, CA)
- …Clocking, Reset, Test & Debug. - Develop and implement methodologies for I/O, DFT , Debug, Clocking and Power Management. Basic Qualifications - BS degree or higher ... knowledge of in one or more areas such as CPU , DSP, or programmable accelerators - SoC bring-up and...high-volume SoCs in advanced design nodes - Experience with DFT tools for scan and BIST insertion - Experience… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Sr. Physical Design Engineer to continue to innovate on behalf of our customers. We are a part of ... hard. Have fun. Make history. As a Physical Design Engineer , you will: - Work with RTL/logic designers to...solving physical design challenges across various technologies such as CPU , DDR, PCIe, fabrics etc. - Experience in extraction… more
- Palo Alto Networks (Santa Clara, CA)
- …capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test platforms for network ... covering structural and functional testing for PCBA and System level + Drive DfT (Design for Testability) and functional test coverage analyses from early Prototype… more
- Google (Sunnyvale, CA)
- …+ 10 years of experience with architecting manufacturing test solutions for CPU /GPU based products. + Experience in technical leadership, project management, and ... via reviews and dashboards; work closely with design engineering teams on DFT and to manage dependencies for test development. + Develop technical documentation… more
