We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... Systems design . + A deep understanding of ASIC design flow including RTL design...virtual channels. + Interest or have prior experience in efficiency enhancement, such as, flow development and code generator.… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Qualcomm (Santa Clara, CA)
- …Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR ... and emulation strategies) to continuously push the quality and efficiency of test benches + Successful candidate will be...Science, Engineering, or related field and 3+ years of ASIC design , verification, validation, integration, or related… more
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible for crafting all aspects ... team member, you will be collaborating with other architects, ASIC designers and verification engineers to design ...and propose and implement new ways to improve the efficiency in the GPU/CPU clocking design . What… more
- Meta (Sunnyvale, CA)
- …through architecture, to firmware, and algorithms.We are seeking an SoC Modeling ASIC Engineer to support C++/Python modeling and software interfaces of ... pipelines to the dedicated hardware accelerators. **Required Skills:** SoC Modeling ASIC Engineer Responsibilities: 1. Analyze the software pipelines and… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Emulation Responsibilities: 1. Develop emulation testbenches in System ... **Summary:** Meta is hiring ASIC Emulation Engineers within our Infrastructure organization. We...SOC interfaces. 7. Develop emulation validation components for validation efficiency in testing, debug and automation. 8. Develop and… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors on our ... efficiency + You are expected to understand the design and implementation, develop power metrics and drive power...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking elite ASIC RTL/Verification ASIC engineers to develop the core Verification and RTL infrastructure of the world's leading GPUs. This position ... team of dedicated Infrastructure engineers continuously upgrades the NVIDIA Hardware design environment. We focus relentlessly on Infrastructure improvement so that… more
- NVIDIA (Santa Clara, CA)
- …+ 5+ years of relevant industry experience + Exposure to computer architecture, ASIC design , and verification methodology is required + Experience with ... NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools...with a specialty in tools and automation to drive efficiency and collaboration among our High Speed IO engineering… more
- Google (Mountain View, CA)
- …shape the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. Google's mission is to organize the world's ... AI, Software, and Hardware to create radically helpful experiences. We research, design , and develop new technologies and hardware to make computing faster,… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is looking for an experienced Silicon Packaging design Engineer for its Ecosystem and Technical Operation team to support the development of ... create as part of a world-class engineering team. **Required Skills:** Silicon Packaging Design Engineer Responsibilities: 1. Perform package design for… more
- Google (Sunnyvale, CA)
- …on computer architecture. + 2 years of experience with C++/Python software design principles. + Experience with hardware description languages (eg, System Verilog) ... and chip design flow. + Experience building test automation tools and...the next generation of hardware experiences, delivering unparalleled performance, efficiency , and integration. In this role, you will work… more
- NVIDIA (Santa Clara, CA)
- We are now hiring for a Senior Logic and Digital Circuit Design Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... gaming, artificial intelligence, deep learning, and autonomous driving. Your design will be consumed by standard as well as...you'll be doing: + You will be working with ASIC controller teams to define a unified interface +… more
- Qualcomm (Santa Clara, CA)
- …develop and drive CPU timing closure for Oryon CPU Cores. As a CPU Physical Design Timing Engineer , you will work with microarchitecture and RTL design ... create designs that push the envelope on performance, energy efficiency and scalability. **About The Role:** In this role...Layout Parasitic Extraction, feed through handling, + Knowledge of ASIC back-end design flows and methods and… more
- NVIDIA (Santa Clara, CA)
- …of this team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, and Physical Design teams to study ... for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- NVIDIA (Santa Clara, CA)
- …Power Team, you will collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, Product teams and Physical Design ... for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency...power design . + Familiarity with Verilog and ASIC design principles, including knowledge of Power… more
- NVIDIA (Santa Clara, CA)
- …Power Modeling, Methodology and Analysis Team, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software ... We are now looking for an Architecture Energy Modeling Engineer ! At NVIDIA, we pride ourselves in having energy-efficient...in energy-efficient GPU designs. + Familiarity with Verilog and ASIC design principles is a plus. +… more
- NVIDIA (Santa Clara, CA)
- NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency . We are continually innovating to deliver new and creative, unusual solutions to ... we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in...position will collaborate with Technical Package Lead and different design teams in the design and development… more
- NVIDIA (Santa Clara, CA)
- …BS or MS in Electrical/Computer Engineering or equivalent experience. + 8+ years in ASIC , clock design /architecture, silicon system design , and debugging. + ... at the forefront of graphics and artificial intelligence performance, efficiency , and innovation. From our roots as a groundbreaking...industries. NVIDIA Silicon Solutions Group is seeking a versatile engineer to be part of the HW ArchDev team.… more
- Meta (Menlo Park, CA)
- …software and hardware technologies for AI at datacenter scale. Hardware Systems Engineer in RTP work closely with HW/SW co- design teams, hardware ... **Summary:** Meta is seeking a Hardware Systems Engineer to join our Release to Production (RTP)...work experience in one or more domains such as: ASIC development (Silicon design or bringup or… more