We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement block/ IP /SoC verification ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and implement IP /SoC verification plans, ... **Summary:** Meta is hiring ASIC Design Verification Engineer ...organization. We are looking for individuals with experience in Design Verification to build IP and System… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Evaluate, develop and ... and NOC subsystems 15. 4. SystemVerilog/UVM methodology or C/C++ based verification 16. 5. ASIC development cycles 17. 6. IP /sub-system or SoC (System On Chip)… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... 3. Deliver physical design of an end-to-end IP or integration of ASIC /SoC design...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Amazon (Cupertino, CA)
- … design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, ... rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze...innovate, explore new solutions, and contribute to the company's intellectual property through patents About the team… more
- Arrow Electronics (San Jose, CA)
- **Position:** Senior ASIC Design Engineer (eInfochips Inc) **Job Description:** **What candidate will Be Doing:** + Map multi-million gate SoC designs onto ... prototyping methodology. + **Option to engage in block-level RTL design or block or top-level IP integration.**...by a minimum of 10 years of experience in ASIC or a related field, or a Master's Degree… more
- Google (Sunnyvale, CA)
- …and its integration within AI/ML-driven systems. As an Application-Specific Integrated Circuit ( ASIC ) Physical Design Engineer on the Chip Implementation ... practical experience. + 3 years of experience in physical design and methodologies. + Experience with place and route...an emphasis on computer architecture. + Experience with physical IP integration (eg memories, IO's, analog PHYs). + Experience… more
- Google (Mountain View, CA)
- …with an emphasis on computer architecture. + 10 years of industry experience with IP design . + Experience with methodologies for low power estimation, timing ... or equivalent practical experience. + 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture. + Experience with a scripting… more
- Google (Sunnyvale, CA)
- …AI acceleration. In this role, you will design Register-Transfer Level (RTL) Intellectual Property ( IP ) with a focus on chip-to-chip interconnect ... of hardware experiences, delivering unparalleled performance, efficiency, and integration. As a Design Engineer , you will play an important role in designing… more
- Qualcomm (Santa Clara, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... , Computer Engineering, or a closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology + 3+ years of… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Engineer to help us trail-blaze new ... analysis, physical verification, ECO and sign-off - Develop physical design methodologies - Evaluate 3rd party IP ...MS + 6yrs in EE/CS - 6+ years in ASIC Physical Design from - RTL-to-GDSII in… more
- Qualcomm (Santa Clara, CA)
- …This is the Invention Age - and this is where you come in as an ASIC Design Verification Engineer The team is responsible for the complete verification ... Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design , verification, validation, integration, or related work experience. OR… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for our AR/MR products. We manage our ASIC design environment, develop methodologies and craft tools to streamline the design ... **Summary:** META is hiring ASIC Silicon Infrastructure Engineer within our...with internal infrastructure team on adapting Meta infrastructure/tooling to ASIC design solutions, including but not limited… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ASIC vendor ... policy, timing corners, extraction, aging, and reliability metrics, for IP and SOC, from synthesis to Tape Out. 3....teams and with vendors Knowledge of front-end and back-end ASIC tools. 16. Experience with RTL design … more
- Meta (Sunnyvale, CA)
- …ample opportunities to partner and collaborate with full stack software, hardware, ASIC Design , Emulation and Post-Silicon teams towards creating a first-pass ... silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide...Experience to quickly understand and interpret specifications and extract design behaviors/properties 18. Experience in formal property … more
- Meta (Sunnyvale, CA)
- …(SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical Synthesis ... of experience as a Front End Synthesis & Integration Engineer 11. Experience with RTL Synthesis and design...Power, Performance, Area. 12. Knowledge of front-end and back-end ASIC tools. 13. Experience with RTL design … more
- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat and ... Integration (Clocking, Reset, PLL, etc) 12. Knowledge of front-end ASIC flows 13. Experience with RTL design ...to $203,000/year + bonus + equity + benefits **Industry:** Internet **Equal Opportunity:** Meta is proud to be an… more
- Qualcomm (Santa Clara, CA)
- …create a smarter, connected future for all. As a Qualcomm ASIC Engineer , you will define, model, design (digital and/or analog), optimize, verify, validate, ... implement, and document IP (block/SoC) development for a variety of high performance,...Science, Engineering, or related field and 6+ years of ASIC design , verification, validation, integration, or related… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable ... + Min 7+ years in sales and account management or as an Applications Engineer or Design Engineer with proven track record of success Be proud and passionate… more