We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Meta (Sunnyvale, CA)
- …Emulation and Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Memory Management Design Verification ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...Qualifications:** Preferred Qualifications: 13. Experience with verification for ARM/RISC-V/x86 Memory management (MMU) subsystem verification 14. Experience… more
- Meta (Sunnyvale, CA)
- …the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Lifecycle Responsibilities: 1. Work across all… more
- Meta (Sunnyvale, CA)
- …entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Silicon Lifecycle Engineering team, you will be part ... to deliver reliable and performant silicon to our applications. **Required Skills:** ASIC Engineer , Infra Silicon Lifecycle Responsibilities: 1. Work across all… more
- Meta (Sunnyvale, CA)
- …the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Enablement (Pre/Post Silicon Validation)… more
- Meta (Sunnyvale, CA)
- …the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Enablement (Pre/Post Silicon Validation)… more
- Meta (Sunnyvale, CA)
- …the entire Silicon Lifecycle to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Enablement team, you will be part ... ASIC solutions for Meta's data center applications. **Required Skills:** ASIC Engineer , Infra Silicon Lifecycle Responsibilities: 1. Work across all… more
- Amazon (Cupertino, CA)
- …design quality and making the right trade-offs. Key job responsibilities As an ASIC Design Engineer , you will: * Develop and implement high-performance, area ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
- Palo Alto Networks (Santa Clara, CA)
- …including: ASIC , Board design, PCB layout, Operations supply base management , Platform Software + Evaluate design tradeoffs and optimize design performance / ... Firewall and SD-WAN hardware including: selecting components; modeling and simulating memory and serdes interfaces; modeling PDN networks; defining PCB routing… more
- SanDisk (Milpitas, CA)
- …ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world ... the global supply chain has access to the Flash memory it needs to keep our world moving forward....SSD controller architecture. + Testing firmware on HAPS (High-Performance ASIC Prototyping Systems) or in‐house ASIC prototyping… more
- Meta (Sunnyvale, CA)
- …accelerate machine-learning and compute-vision workloads. **Required Skills:** Digital Design Engineer Responsibilities: 1. Contribute to ASIC digital ... **Summary:** We are growing our ASIC Design and uArchitecture team within RL and...microarchitecture and design for low-power interconnect and power management IPs 2. Contribute to chip-level integration, verification plan… more
- Meta (Menlo Park, CA)
- **Summary:** Meta is seeking a Systems Engineer to join our Release to Production (RTP) team working on AI/ML initiatives supporting large scale AI Training and ... Silicon hyperscalar bring up and validation. **Required Skills:** Hardware Systems Engineer , NPI AI Responsibilities: 1. Lead the bring-up, validation, and… more
- Meta (Menlo Park, CA)
- …the new product introduction (NPI) phase. **Required Skills:** Hardware Systems Engineer , AI NPI Responsibilities: 1. Drive and execute end-to-end system validation ... years of work experience in one or more domains such as: ASIC development (Silicon design, bringup, characterization, validation), board level debug, firmware… more
- Google (Mountain View, CA)
- …secure end to end manufacturing solutions including key provisioning, life-cycle management and SOC security. + Experience of secure infrastructure deployment for ... Experience development of multi site libraries to implement ATE OTP programming, memory repair and validation methodologies and processes. + Experience with ATE test… more
- Broadcom (San Jose, CA)
- …towards unified solution. -Lead in identification, development & qualification; program management with external assembly partners -Lead in memory supplier(s) ... Account, please Sign-In before you apply.** **Job Description:** *As part of WW ASIC product development team, this individual will work closely with silicon &… more
- Siemens (Fremont, CA)
- …triage and debugging skills + Deep knowledge of semiconductor IC industry - ASIC , SoC, Memory , Interconnect, CPU architectures, embedded systems + Ability to ... working across a range of areas from application engineering support and management , verification and validation of complex semiconductor ICs, system testing, and… more
- NVIDIA (Santa Clara, CA)
- …outstanding people. Join NVIDIA's Silicon Solutions Group (SSG) as a pivotal engineer within our Hardware Architecture Development ( ArchDev ) team. Positioned at ... you'll be doing: + Lead a distributed System Integration and Power Management team across all NVIDIA silicon projects. + Foster collaboration across Architecture,… more
- NVIDIA (Santa Clara, CA)
- …will run multiple concurrent projects through active prioritization, and communication. On the engineer management side, we want the manager to continue to groom ... see in its lifetime! Our organization engages with architecture, ASIC and operations team to build methodologies to push...to stand out from the crowd: + Knowledge of memory , graphics, compute or high speed interface is a… more
- NVIDIA (Santa Clara, CA)
- …will run multiple concurrent projects through active prioritization, and communication. On the engineer management side, we want the manager to continue to groom ... see in its lifetime! Our team engages with architecture, ASIC and operations team to build methodologies to push...to stand out from the crowd: + Knowledge of memory , graphics, compute or high speed interface is a… more