We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Meta (Sunnyvale, CA)
- …efficient System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Methodology Responsibilities: 1. Work with our ... **Summary:** Meta is hiring ASIC Methodology Engineers within our Infrastructure organization to work on design integrity and signoff methodology … more
- Amazon (Sunnyvale, CA)
- …Amazon Echo, and the Astro personal robot. What will you help us create? As an ASIC Methodology / CAD engineer you will create and maintain automated design ... flows that improve the efficiency and design quality of the finished ASIC products. Key job responsibilities - Develop automated flows for improving the SoC design… more
- Amazon (Cupertino, CA)
- …handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design Methodology Engineer to help us trail-blaze ... flows for ML Accelerator chips in advanced nodes Drive improvement in RTL2GDS flows/ methodology for PPA and TAT improvements Create Dashboard and Central reports for… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented itself over two decades. Our invention ... and intelligence. Make the choice to join us today. NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading GPU and SoC's.… more
- Cisco (San Jose, CA)
- …of the ASIC in products. Your Impact: You are a hard-working, motivated ASIC verification engineer who will be joining our team and contributing to the ... will have a Design Verification background, in-depth experience in System Verilog and UVM methodology , with experience working in C++, scripting, as well as ASIC … more
- Qualcomm (Santa Clara, CA)
- …a closely related field is preferred + 5+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 5+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- Qualcomm (Santa Clara, CA)
- …Science, or a closely related field + 2+ years of experience with ASIC design and verification tools, techniques, and methodology **Preferred Qualifications** + ... Master's degree in Computer Science, Electrical Engineer , Computer Engineering, or a closely related field +...closely related field + 3+ years of experience with ASIC design and verification tools, techniques, and methodology… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 9. 10+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 10. 10+ years experience… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...cycles 9. 14+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 10. 14+ years experience… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...joining Meta. 7. 3+ years hands-on experience in SystemVerilog/UVM methodology or C/C++ based verification 8. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Define and ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the...experience. 8. 5+ years of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification. 9. Track record of… more
- Meta (Sunnyvale, CA)
- …Post-Silicon teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Formal Verification Responsibilities: 1. Provide technical ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the...Verification 2. Propose, implement and evangelize the Formal Verification Methodology to be used across the group, both at… more
- Cisco (San Jose, CA)
- …years of related experience * Experience in System Verilog/UVM. * Experience with ASIC design and verification processes, debugging, methodology , and tools. * ... With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT, physical design,...a system company, so you can also use the ASIC to work with the System and Software teams… more
- NVIDIA (Santa Clara, CA)
- …never been a more exciting time to join our team! NVIDIA is seeking outstanding ASIC Design Engineers to design and implement the world's leading GPU and SoC's. You ... graphics to self-driving cars and the growing field of artificial intelligence. System- ASIC team works closely with System Architecture team on product definitions,… more
- Cisco (San Jose, CA)
- …provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography ... culture and breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Write micro-architecture specifications and participate… more
- Cisco (San Jose, CA)
- …aspects of our systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance products, ready ... what's possible! Your Impact You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding...block or top-level IP integration. * Helping develop efficient methodology to promote block level SDCs to fullchip, and… more
- Meta (Sunnyvale, CA)
- …complex SoC and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture ... **Summary:** Meta is hiring ASIC Design Engineers within our Infrastructure organization to...in SoC Micro-architecture, Design and Integration, OR Implementation, Power methodology development 12. Experience working across multiple projects 13.… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...the various partition blocks. 9. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis,… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure organization. We...the various partition blocks. 8. Developing Automation scripts and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis,… more
- Meta (Sunnyvale, CA)
- …on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Timing Responsibilities: 1. Develop Timing Constraints ... **Summary:** Meta is hiring ASIC Frontend Implementation Engineers within our Infrastructure organization....for Timing, Area, Power. 6. Developing Automation scripts and Methodology for all FE-tools including ( Synthesis, STA). 7.… more