We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Meta (Sunnyvale, CA)
- …role, you will lead the development of cutting-edge hardware accelerator IPs. **Required Skills:** ASIC IP Design Manager , Reality Labs Responsibilities: ... we invite you to join our team as an ASIC Design Manager . In this...Execution: Drive RTL design planning and execution, design methodology development, IP design ,… more
- Meta (Sunnyvale, CA)
- …To apply, click "Apply to Job" online on this web page. **Required Skills:** Asic Manager , Design Verification Responsibilities: 1. Work with researchers and ... defining verification plans for each of the different core IP . 2. Define and track detailed test plans for...for the different modules and top levels. 3. Drive Design Verification to closure based on defined verification metrics… more
- Meta (Fremont, CA)
- …at core suppliers. 4. Provide commodity and/or supplier expertise and consulting to ASIC design engineering for technology migration and lower TCO. 5. Drive ... via a customized supply chain. The Foundry, Packaging & IP Commercial Sourcing Manager will act as...management in a high tech environment. 12. Knowledge of ASIC Design flows. 13. Experience to move… more
- Meta (Sunnyvale, CA)
- … ASIC DevX, and Enterprise Engineering teams on adapting FB infrastructure to ASIC design solutions, including but not limited to Source Control Management, ... **Summary:** Meta is hiring ASIC Engineering Manager within our Infrastructure...support. 12. Experience with developing and supporting solutions for ASIC design environment and infrastructure. 13. Experience… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...modes. * Option to also do block level RTL design or block or top-level IP integration.… more
- Meta (Sunnyvale, CA)
- …managing technical teams, including performance management 12. 10+ experience in ASIC Design , Development or Validation (Silicon bringup, validation, emulation, ... approach to Pre & Post Silicon Development and Validation **Required Skills:** ASIC Engineering Manager , Silicon Enablement Responsibilities: 1. You will lead… more
- Cisco (San Jose, CA)
- …timing in multiple timing modes. * Option to also do block level RTL design or block or top-level IP integration. * Helping develop efficient methodology ... are received. Meet the Team Join our dynamic front-end design team at Cisco Silicon One, where innovation meets...systems, leveraging the latest technology. We're seeking a talented ASIC engineer with a proven track record in high-performance… more
- Meta (Sunnyvale, CA)
- …technical sessions to track and follow up on issues. **Required Skills:** Silicon IP Technical Program Manager Responsibilities: 1. Serve as the primary point ... Qualifications:** Minimum Qualifications: 12. 10+ years of experience in silicon/ ASIC /firmware/ IP program management. 13. Experience dealing with ambiguity… more
- Cisco (San Jose, CA)
- … ASIC team can provide. You will work with exceptional talent with vast ASIC design and development expertise. With Cisco being a systems company, you will ... networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a...documentation. * Option to also do block level RTL design or block or top-level IP integration.… more
- Meta (Fremont, CA)
- …standards and cost-savings via a customized supply chain. As a Technical Sourcing Manager , you will be the primary technical contact for supplier engagement and ... the lowest total cost of ownership. **Required Skills:** Technical Sourcing Manager , Network Systems (Optics) Responsibilities: 1. Develop, manage and refresh… more
- Broadcom (San Jose, CA)
- …**Job Description:** Broadcom's ASIC Product Division is seeking candidates for a DFT Manager position at our San Jose Design Center. As a DFT Manager ... meeting per week + Your strong partnerships with internal Physical design teams, IP teams & GO-Test/Yield/Qual Engineering teams will matter the most for… more
- quadric.io, Inc (Burlingame, CA)
- …in compiler strategies for data parallel processors such as GPUs, DSPs and ASIC design flows * Knowledge of end-to-end toolchain, including compilers, linkers ... Field Applications Manager (Worldwide) Location: Burlingame, CA Description If making...using our Chimera GPNPU (general purpose neural processor unit) IP for a wide range of products -- from… more