We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Meta (Sunnyvale, CA)
- …Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Synthesis Responsibilities: 1. Run Logic/Physical ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...10. 10+ Years of experience as a Front End Synthesis & Integration Engineer 11. Experience with… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. ... **Summary:** Meta is hiring ASIC Implementation Engineers within our Infrastructure...the DFT coverage for Stuck-at faults. 5. Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate… more
- Meta (Sunnyvale, CA)
- …this web page. **Required Skills:** ASIC Engineer , Implementation Responsibilities: 1. Run logic/physical synthesis using advanced optimization ... and corresponding reset sequence for RDC. 10. Develop timing constraints for RTL- synthesis and PrimeTime-STA for blocks and top-level including SOC. 11. Analyze… more
- SpaceX (Sunnyvale, CA)
- …world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation ). In this role, you will be ... Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering)...capabilities of the Starlink network. RESPONSIBILITIES: + Perform partition synthesis and physical implementation steps (eg … more
- Broadcom (San Jose, CA)
- …Account, please Sign-In before you apply.** **Job Description:** **Job Description:** + ASIC implementation engineer with demonstrated expertise in multiple ... members. **Experience:** + Requires a minimum of 8 years of related ASIC implementation experience. + BS degree in Electrical Engineering or Computer Engineering… more
- Meta (Sunnyvale, CA)
- …System on Chip (SoC) and IP for data center applications. **Required Skills:** ASIC Engineer , Physical Design Responsibilities: 1. Develop and own physical ... **Summary:** Meta is hiring ASIC Physical Design Engineers within our Infrastructure organization....We are looking for individuals with experience in backend implementation from Netlist to GDSII in low power and… more
- Broadcom (San Jose, CA)
- …be challenged and gain valuable experience towards enhancing a successful career in ASIC design. You will involve in engineering implementation spec writing from ... marketing/system requirements, RTL design and verification, synthesis , static timing analysis. You will either be responsible for block and/or chip level design and… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to ... of ASIC design flow including RTL design, verification, logic synthesis , timing analysis, ECO, and post silicon debug. + Strong interpersonal skills… more
- Google (Sunnyvale, CA)
- …Verilog/SystemVerilog. + Experience with industry-standard EDA tools for simulation, synthesis , and power analysis. Preferred qualifications: + Master's degree or ... related field. + 5 years of experience in Application-specific integrated circuit ( ASIC ) design. + Experience working on interconnects and network subsystems. Be… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... full chip level. + Help in driving frontend and backend implementation including synthesis , equivalence checking, floor-planning, timing constraints, timing… more
- NVIDIA (Santa Clara, CA)
- …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... CPUs and GPUs. + Explore design space, create optimum floorplan, drive synthesis , physical implementation , and timing closure by understanding arch/logic as… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for an ASIC Design Engineer to join our Global Circuits Team! In this position, you'll make a real impact in a dynamic, technology-focused ... you will be responsible for the micro-architecture and digital design implementation of various innovative IPs for hardware security, clocking, voltage regulation… more
- NVIDIA (Santa Clara, CA)
- We are now looking for an ASIC Design Efficiency Engineer ! NVIDIA is seeking extraordinary methodology engineers to design hardware accelerators and processors ... of the art performance and efficiency. + Understand the design and implementation , develop methodology and infrastructure to drive Performance, Power and Area (PPA)… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... of the DFX methodology team, you will be responsible for the architecture, design, implementation and verification of fuse controller and other DFT IPs for our next… more
- NVIDIA (Santa Clara, CA)
- …timing including setting up timing constraints, timing analysis and closure, ECO implementation , and timing methodologies. + Finding the right tradeoffs and balance ... MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA...and Timing + Hands-on experience in STA tools, ECO implementation , and timing closure of high-speed designs. + Strong… more
- Amazon (Sunnyvale, CA)
- …checks and design verification methodology - Develop, regress and deploy digital implementation flows including Synthesis and Formal Verification - Enable ... Come work at Amazon! The Role: As Senior CAD Engineer you will be responsible for installing and maintaining...design automation and methodology team and deliver digital design implementation flows to design teams using various silicon processes… more
- NVIDIA (Santa Clara, CA)
- …most powerful design implementation and analysis tools + Provide support for ASIC tools and flows + Assist chip design teams with advanced implementation ... NVIDIA's chip design methodology! We're responsible for the Front-End Design Implementation methodology for all of NVIDIA's semiconductor products. As part of… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …a plus. + Must have a deep technical knowledge and understanding of digital implementation flows ( synthesis , place & route and signoff) and/or experience with ... understanding of the core technology requirements in the digital implementation and/or functional/formal verification space , coordination of sales strategies… more
- Google (Mountain View, CA)
- …schemes to improve Performance, Area and Power. + Develop all aspects of ASIC RTL2GDS implementation for designs. + Manage physical implementation ... in Physical Design. + Experience in one or more synthesis /PnR tools (eg, Genus, Innovus, DC, ICC). + Experience...including STA and sign-off. Preferred qualifications: + Experience with ASIC design flows and methodology of Physical design. +… more
- Qualcomm (Santa Clara, CA)
- …transformation to help create a smarter, connected future for all. Qualcomm's SoC Implementation Team is looking for skilled engineers to focus on timing constraints ... for premium-tier chips. This is an excellent opportunity to join the Snapdragon implementation team, which is responsible for SoCs in sub-3nm nodes across mobile,… more