We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Google (Sunnyvale, CA)
- …TPU architecture and its integration within AI/ML-driven systems. As an Application-Specific Integrated Circuit ( ASIC ) Physical Design Lead on the chip ... equivalent practical experience. + 8 years of experience in ASIC physical design and methodologies...and to required quality levels. You'll work on and lead teams performing physical design … more
- The Boeing Company (Mountain View, CA)
- …and tools from block-level micro-architecture, through HDL coding, and physical design realization (through gate-level netlists for ASIC designs) + Integrate ... Weapons Systems has an exciting opportunity for multiple ** ASIC and/or FPGA Design and Verification Engineers** (Experienced, Lead , or Senior) to join us as… more
- Cisco (San Jose, CA)
- …You will work with outstanding talent and vast ASIC development expertise in design , DV, DFT, physical design , and post-silicon validation The team ... What You'll Do * You will participate in the ASIC design verification for Cisco high-end switching...Inclusive Communities, which unite people around commonalities or passions, lead the way. Together, we're committed to learning, listening,… more
- The Boeing Company (Mountain View, CA)
- …us. Boeing Electronic Products is seeking a talented and highly motivated ** ASIC /FPGA Design Senior Engineering Manager** to develop state-of-the-art digital ... an exciting time for the organization where we're onboarding design and verification engineers at every level at three...three new sites, and the new managers will help lead the hiring to build their teams from the… more
- Palo Alto Networks (Santa Clara, CA)
- …management for networking IP and backend + Technical expertise on the entire ASIC design flow-architecture, logic design , RTL coding, verification, FPGA ... Career** We are looking for a Senior Director of ASIC Engineering to manage and lead a...10+ year industrial experience + Minimum of 10 years ASIC design /verification and 5 years of … more
- Cisco (San Jose, CA)
- …flows. * Your team will participate in the creation of Innovative Hardware DFT & physical design aspects for new silicon device models, bare die & stacked die, ... for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers...be in the Silicon One development organization as an ASIC DFT Product Lead in San Jose,… more
- Amazon (Sunnyvale, CA)
- …Verification LEC DRC LVS etc. - Be single point contact for bugs and issues for physical design team - Build flow in TCL, Python to ensure quality and faster ... opportunity to shape the technical direction of critical IC design workflows and lead a team of...infrastructure - 7+ years of silicon EDA and/or digital ASIC design experience Preferred Qualifications - Master's… more
- Cisco (San Jose, CA)
- …as per need for verification robustness. * Guide and mentor a team of physical design engineers on project-level backend implementation and partner closely with ... Science, with 10+ year minimum of hands-on experience in ASIC implementation and Physical verification * Experience...Experience working with one or more of the following physical design tools, such as Cadence, Innovus,… more
- Broadcom (San Jose, CA)
- …route, clock methodology, power planning and analysis, timing closure, signal integrity and physical design checks. Participate in large complex design ... before you apply.** **Job Description:** Broadcom is lookign for ASIC implementation engineer with demonstrated expertise in multiple disciplines...nodes, lead one or more disciplines in design closure as part of the design … more
- Google (Sunnyvale, CA)
- …or Computer Science, with an emphasis on computer architecture. + 5 years of experience in ASIC design with 3 years of experience working on security design . ... this role, you will utilize, a background in RTL design , and the ability to lead multi-faceted...to verify and debug RTL designs. + Work with physical design teams to ensure design… more
- Capgemini (Santa Clara, CA)
- …including strategic account development in complex semiconductor services sales, particularly in ASIC design services and sales pursuit management with at least ... of Semiconductor Sales Practice at Capgemini Engineering, you will lead the sales and Industry SME teams for a...foundries, EDA companies, and IP providers. + Background in ASIC Design or Semiconductor Technology R&D is… more
- Google (Sunnyvale, CA)
- …(https://careers.google.com/benefits/) . + Gather system requirements, define architecture, execute hardware design , and product validation. + Lead the bring up, ... This is a specialized role which requires physical interaction with hardware equipment in a simulated...6 years of experience working in a hardware systems design , or 5 years of experience with an advanced… more
- Cadence Design Systems, Inc. (San Jose, CA)
- …and to R&D. You are a motivated and energetic engineer with a deep understanding of ASIC design methodologies and of every stage of the RTL to GDSII flow. You ... design engineer or as a product engineer Strong understanding of VLSI physical design and timing analysis; familiarity with digital implementation challenges… more
- Qualcomm (Santa Clara, CA)
- …on RTL and Netlist using tools like Joules and PTPX. + Work closely with RTL design , Synthesis, and physical design teams to measure and optimize power. + ... propose new power optimization techniques at RTL, Synthesis and Physical Design Stages. + Tabulate metrics results...Power analysis and optimization required + 15+ years of ASIC design , or related work experience. +… more
- Microsoft Corporation (Santa Clara, CA)
- …+ Lead key components of functional validation of complex ASIC SOC using UVM/C test bench + Perform pre-silicon SoC verification, post-silicon ... high-energy engineers to help achieve that mission. As a Senior Silicon Engineer - ASIC verification in the Data Processing Unit team you will be validating silicon… more
- Google (Sunnyvale, CA)
- …or benefits. Learn more about benefits at Google (https://careers.google.com/benefits/) . + Lead System Signal Integrity (SI) design on data center hardware ... This is a specialized role which requires physical interaction with hardware equipment in a simulated...bash). Understanding of FEC and its implications for system design . + Experience with Allegro, HFSS, SIwave, ADS, Matlab,… more
- SpaceX (Sunnyvale, CA)
- …who will work alongside world-class cross-disciplinary teams (systems architecture, ASIC design , firmware, pre-silicon verification, post-silicon validation, ... You will be an integral part of the IC design team and lead the discipline of...age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status. Applicants… more
- Siemens (Fremont, CA)
- …and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip ... design . We have a unique company culture. With its...and/or coach junior AEs on the team, participate in lead roles solicited by management Travel: Approximately 25% travel… more
- Broadcom (San Jose, CA)
- …multiple different customer meeting per week + Your strong partnerships with internal Physical design teams, IP teams & GO-Test/Yield/Qual Engineering teams will ... Account, please Sign-In before you apply.** **Job Description:** Broadcom's ASIC Product Division is seeking candidates for a DFT...Design Center. As a DFT Manager, you will lead a group of highly performing DFT Engineers working… more
- Siemens (Fremont, CA)
- …to build a career in a rapidly growing and constantly innovating Electronic Design Automation (EDA) industry? Do you enjoy working with cutting edge technology and ... for candidates who like to interact with and influence others, possess strong design and/or verification background, requiring both in depth knowledge of HDL and… more