We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Qualcomm (Santa Clara, CA)
- …will power the future. Come and join us on this exciting adventure. Sharpen your formal verification skills to their fullest on some of the complex designs ever ... design team? Are you interested in the application of formal methods to the verification of application...contributing to the development of the next generation of formal methodologies in this space? The Qualcomm CPU… more
- Qualcomm (Santa Clara, CA)
- …Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... correctness. + Experience in leading a small team of Verification engineers performing CPU Verification ....of Verification engineers performing CPU Verification . + Advance techniques such as: Formal ,… more
- Qualcomm (Santa Clara, CA)
- …digital transformation to help create a smarter, connected future for all. As a Qualcomm CPU Engineer , you will lead innovative Central Processing Unit ( CPU ) ... design verification . * 6+ years of work experience with simulation, emulation, formal verification , or silicon validation. * 6+ years of experience in… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in ... On Chip (SoC) for data center applications. As a Formal Verification Engineer , you will...verification of complex compute blocks such as DSP, CPU , GPU or HW accelerators 19. Experience with complex… more
- Amazon (Sunnyvale, CA)
- …is powering the latest generation of Echo devices is looking for a Senior Design Verification Engineer to continue to innovate on behalf of our customers. We are ... quickly resolve blocking issues. Key job responsibilities - Design Verification of Subsystems such as CPU , NPU,...industry standard buses like AMBA AXI4 - Experience with formal verification - Experience with post-silicon validation… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification Engineer , you will be part ... teams towards creating a first-pass silicon success. **Required Skills:** ASIC Engineer , Design Verification Responsibilities: 1. Develop functional tests based… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of a dynamic team working with the best… more
- Meta (Sunnyvale, CA)
- **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design ... On Chip (SoC) for data center applications.As a Design Verification Engineer , you will be part of...or more of the following areas along with functional verification -SV Assertions, Formal , Emulation. 12. Experience in… more
- Siemens (Fremont, CA)
- …Applications Engineer (AE) position delivers technical expertise for Functional Verification of digital, mixed-signal, and analog IC chip designs based on ... across a range of areas from application engineering support and management, verification and validation of complex semiconductor ICs, system testing, and beyond? If… more
- Amazon (Cupertino, CA)
- …or CE. - Experience using multiple verification platforms - Experience with formal verification - Experience with embedded software - Strong ability to deal ... Python, or Perl - Significant experience in IP level design verification preferably in the CPU /compute space. Preferred Qualifications - MS Degree or Higher in… more
- Meta (Sunnyvale, CA)
- …NOC, Memory and Peripheral Subsystems 12. Experience with Synthesis, Timing Closure and Formal Verification Methodology 13. Master's or PhD degree in Electrical ... and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3.… more
- Meta (Sunnyvale, CA)
- …16. Experience in HLS 17. Experience with Synthesis, Timing Closure and Formal Verification Methodology 18. Experience with Power Analysis and Optimization ... and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration 2. Micro-architecture development 3.… more
- Meta (Sunnyvale, CA)
- …Memory and Peripheral Subsystems. 10. Experience with Synthesis, Timing Closure and Formal Verification Methodology. 11. Master's or PhD degree in Electrical ... and IP for data center applications. **Required Skills:** ASIC Engineer , Design Responsibilities: 1. Architecture exploration. 2. Micro-architecture development. 3.… more
- LinkedIn (Mountain View, CA)
- …Field Array (FPGA) hardware. You will integrate FPGAs in our current CPU and GPU fleet, and develop high-performance and power-efficient FPGA solutions for ... the large scale AI models. As a Sr. Staff Engineer on the AI Infra team, you will play...not limited to synthesis, place-and-route, timing analysis, validation and verification ) and deploy them on hardware platforms (such as… more