We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Micron Technology, Inc. (San Jose, CA)
- …models (LLMs) for the purpose of automated Silicon design and Design Verification ( DV ). The engineer is expected to build LLM based EDA workflows ... which assists the Design Engineers in building the next Micron product at...LLMs for the purpose of automated corner case uncovering, design optimization and spec-to- design translation. + Develop… more
- Qualcomm (Santa Clara, CA)
- …Summary:** As a CAD Engineer focusing on the methodology and support of RTL design verification , you will work with architecture, design , software and ... the design methodology and high level requirements in support of design verification . + Collaborate with chip leads to determine other areas to support… more
- Cisco (San Jose, CA)
- ASIC Design Verification Engineer , Technical Leader Apply (https://jobs.cisco.com/jobs/Login?projectId=1447177) + Location:San Jose, California, US + Area of ... in the Silicon One development organization as an ASIC design verification engineer in San...during ASIC bring-up. **What You'll Do:** + Maintaining existing DV environments and enhancing them + Construct test bench… more
- Amazon (Sunnyvale, CA)
- … verification , preferably in communication systems - Familiarity with Matlab - Modem design verification experience - System C or Matlab model : development ... blocks to ensure functional correctness . Work with the design and communication systems team and participate in system...or DV integration experience - Familiarity with formal … more
- Amazon (Sunnyvale, CA)
- …to contribute to a groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and systems teams to ... Enhance your leadership skills while contributing to a dynamic DV team * Create reusable Verification IP...verification simulation solutions. The FPGA verification engineer will work with FPGA design and… more
- Qualcomm (Santa Clara, CA)
- …Area:** Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects ... Verification Plans and Testbenches for your functional domain. + Execute Verification Plans, including Design Bring-up, DV environment Bring-up,… more
- Amazon (Cupertino, CA)
- …instances, and we invite you to build them with us! As an Architecture Verification Engineer , you will be responsible for ensuring the functionality and ... behaviors, among others. Key job responsibilities As an Architecture Verification Engineer you will: * Gain a...of SoC architecture and micro-architecture * Work with architecture, design , DV and SW teams to verify… more
- ManpowerGroup (Santa Clara, CA)
- …a Verification Engineer to join their team. As a Verification Engineer , you will be part of the design verification team supporting the ... which will align successfully in the organization. **Job Title:** Verification Engineer **Location:** Santa Clara, CA **Pay...degree. + 10-15 years of solid experience in UVM design verification . + Strong knowledge of UVM… more
- Microsoft Corporation (Mountain View, CA)
- …will manage and optimize the Cloud infrastructure. We are looking for a **Senior Verification Engineer ** to join the team. Microsoft's mission is to empower ... verification environment including agents and scoreboards for a design . + Apply your knowledge of verification ...the role until July 30th, 2025. \#SCHIE \#CCDO \#azurehwjobs \# DV Microsoft is an equal opportunity employer. Consistent with… more
- Meta (Sunnyvale, CA)
- …with IP, sub-system and SoC Design Verification to execute Design Verification working with DV lead **Public Compensation:** $142,000/year to ... **Summary:** We are looking for a Digital Design Engineer to support our Reality...quality RTL in collaboration with Digital Verification ( DV ) 3. Support back end physical design … more
- Meta (Sunnyvale, CA)
- … 15. Familiar with IP, sub-system and SoC DV and ability to execute design verification working with DV lead 16. Experience developing RTOS drivers in ... **Summary:** We are looking for an experienced digital design engineer to support our Reality...quality RTL in collaboration with Digital Verification ( DV ) 3. Support back end physical design … more
- Meta (Sunnyvale, CA)
- …Engineers within our Infrastructure organization. **Required Skills:** ASIC Implementation Engineer - Static Verification Responsibilities: 1. Perform Flat ... including (Lint, CDC, RDC,) 7. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in...practical experience 9. 6+ years of experience in static verification tools 10. Experience with Lint, Clock Domain &… more
- Amazon (Sunnyvale, CA)
- …which delivers highly differentiated silicon into Amazon Cameras and Doorbells. Our verification team works on state-of-the art SoCs in a vertically integrated team ... environment to deliver products our customers love. Our verification team is involved in early architectural and micro-architectural trade-offs to reduce… more
- NVIDIA (Santa Clara, CA)
- NVIDIA is looking for a Verification Engineer to join our Emulation division. We are a worldwide recognized division noted for groundbreaking technology. We are ... emulator environment issues. + We have continual collaboration with Design , DV , Power, Silicon Validation, Performance, and...Be familiar with hierarchical design approach, top-down design , SoC and system level verification . +… more
- Qualcomm (Santa Clara, CA)
- … verification tests to identify and resolve design issues. In this role of Design Verification Engineer , you will be using advanced state of the art ... connected future for all. We are looking for ASIC Design Verification Engineers with strong CPU, ASIC...setting benchmarks in the whole industry. As an SOC Verification and Methodology Engineer , you will be… more
- Broadcom (San Jose, CA)
- …modulation formats.** + **Experience in integrating the front end design with DV for test methodologies and verification . Providing guidelines for GLS, DFT & ... verification and IP Integration and system level verification .** + **Experience in design management with...and system level verification .** + **Experience in design management with detailed knowledge of development methodologies, … more
- Amazon (Cupertino, CA)
- …design from micro-architecture through physical design - Good knowledge of design verification ( DV ) simulation methodologies - Experience with large ... Silicon Optimization Engineering Team you'll be responsible for the design and optimization of hardware in our data centers....cost effective DFT methodologies * Perform RTL coding and Verification * Participate in Silicon debug and write scripts… more
- Meta (Sunnyvale, CA)
- …including (Lint, CDC, RDC, Synthesis, STA, Power) 9. Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the ... Level and identify power reduction opportunities 4. Run Formal Verification checks between RTL and Gate level netlist and...of experience as a Front End Synthesis & Integration Engineer 12. Experience with RTL Synthesis and design… more
- Qualcomm (Santa Clara, CA)
- …resolve infrastructure issues and ensure productivity on emulation models. + Execute verification plans, including design bring-up, DV environment bring-up, ... CPU Engineering **General Summary:** As a CPU Virtual Platforms Engineer , you will be part of CPU verification... Engineer , you will be part of CPU verification team to deliver complex verification solutions… more
- Cisco (San Jose, CA)
- …ability to map multi-million gate SoCs to FPGAs. You will collaborate closely with Design , DV , and Software teams to understand chip architecture and effectively ... leveraging the latest technology. We're seeking a talented ASIC engineer with a focus on FPGA Prototyping and a...block or top-level IP integration + Collaborate with Software, Design , and Verification teams to validate the… more