We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- Siemens (Fremont, CA)
- …competent leadership from our managers and executives. This Applications Engineer (AE) position delivers technical expertise for Functional Verification ... the sales and support of a wide range to Functional Verification technologies for our leading edge...Skills Preferred (but not required): + Prior 5-10 years Applications Engineering experience is a plus + Knowledgeable in… more
- Siemens (Fremont, CA)
- …EDA could be the place for you! Job Description: This Applications Engineer (AE) position delivers technical expertise for Functional Verification of ... interested in working across a range of areas from application engineering support and management, verification and...the sales and support of a wide range to Functional Verification technologies for our leading edge… more
- Siemens (Fremont, CA)
- …10+ years of experience in semiconductor design, verification , and formal verification . EDA Functional Verification experience desired Travel will be ... design. Position Overview: The Product focused AE for Formal Verification will drive and grow Formal Verification ...200 countries. We're dedicated to equality, and we welcome applications that reflect the diversity of the communities we… more
- Meta (Sunnyvale, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a dynamic ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization.... like Video and AI/ML 12. Experience in XCPU functional verification in one or more areas… more
- Meta (Sunnyvale, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a dynamic ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.… more
- Meta (Sunnyvale, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a dynamic ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....one or more of the following areas along with functional verification -SV Assertions, Formal, Emulation. 12. Experience… more
- Meta (Sunnyvale, CA)
- …in Design Verification to build IP and System On Chip (SoC) for data center applications .As a Design Verification Engineer , you will be part of a dynamic ... **Summary:** Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization....on developing innovative ASIC solutions for Meta's data center applications . You will be responsible for the verification… more
- Meta (Sunnyvale, CA)
- …the entire stack, through algorithms to architecture, transistors to firmware. As a Design Verification Engineer at Meta's Reality Labs, you will work with a ... multiple state of the art machine learning IPs. **Required Skills:** Design Verification Engineer - Machine Learning Accelerators Responsibilities: 1. Work with… more
- Meta (Sunnyvale, CA)
- …entire stack, from transistor, through architecture, to firmware, and algorithms. As a Design Verification Engineer at Meta Reality Labs, you will work with a ... of the art IPs or SoCs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.… more
- Meta (Sunnyvale, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a ... multiple state of the art IPs. **Required Skills:** Design Verification Engineer Responsibilities: 1. Work with researchers...one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.… more
- Abbott (Pleasanton, CA)
- …colleagues serve people in more than 160 countries. **Job Title** **Staff Systems Verification Engineer ** **Working at Abbott** At Abbott, you can do work ... scientists. **The Opportunity** We are recruiting a **Staff Systems Verification Engineer ** to join our Abbott Heart...constraints. You will be applying an expert understanding of applications , customer needs and use, verification best… more
- Meta (Sunnyvale, CA)
- …in Formal Verification to build IP and System On Chip (SoC) for data center applications . As a Formal Verification Engineer , you will be part of a team ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....in Formal Verification 9. Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop,… more
- Meta (Sunnyvale, CA)
- …in Formal Verification to build IP and System On Chip (SoC) for data center applications . As a Formal Verification Engineer , you will be part of a team ... **Summary:** Meta is hiring ASIC Formal Verification Engineer within the Infrastructure organization....in Formal Verification 10. Experience with Formal Verification applications including Datapath, sequential equivalence, Xprop,… more
- Meta (Sunnyvale, CA)
- …the entire stack, from transistor, through architecture, to firmware, and algorithms.As a Design Verification Engineer at Meta Reality Labs, you will work with a ... test cases for multiple state of the art IPs. **Required Skills:** Design Verification Engineer (University Grad) Responsibilities: 1. Work with researchers and… more
- Qualcomm (Santa Clara, CA)
- …Engineering Group, Engineering Group > CPU Engineering **General Summary:** As a Design Verification Engineer , you will work with Chip Architects to validate the ... components such as Stimulus, Checkers, Assertions, Trackers, and Coverage. + Develop Verification Plans and Testbenches for your functional domain. + Execute… more
- SpaceX (Sunnyvale, CA)
- Design Verification Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring the ... possible, with the ultimate goal of enabling human life on Mars. DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our experience in… more
- Amazon (Sunnyvale, CA)
- Description Kuiper Production team FPGA Verification engineer . Creating & Maintaining verification environments and test suites for FPGA based subsystems. ... groundbreaking new system with few legacy constraints. The FPGA verification engineer will work with design and...(Synopsys, Vivado, Quartus) * Experience monitoring and optimizing design verification coverage wrt to line, FSM, functional ,… more
- NVIDIA (Santa Clara, CA)
- We're now looking for a Senior Digital Design Verification Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 ... our diverse team today! As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the...a must. + Experience using random stimulus along with functional coverage and assertion-based verification methodologies a… more
- Cisco (San Jose, CA)
- …of the ASIC in products. Your Impact: You are a hard-working, motivated ASIC Verification Engineer who will be joining our team and contributing to the ... The application window is expected to close on: 6/10/25...engage in dynamic collaboration with Senior micro-architects, designers, and verification engineers and interact with cross- functional software… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Verification Engineer - New College Grad. As a Verification Engineer at NVIDIA, you will verify the design and implementation of ... test bench environments for unit level verification . + Exposure to verification using random stimulus along with functional coverage and assertion-based … more