We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA

  • Senior ASIC Power

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Power Engineer ! NVIDIA is seeking extraordinary power engineers to design hardware accelerators and processors ... are expected to understand the design and implementation, develop power metrics and drive power reductions +...want to hear from you. Come, join our GPU ASIC team and help build the real-time, cost-effective computing… more
    NVIDIA (04/23/25)
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  • Senior ASIC Design Engineer

    Palo Alto Networks (Santa Clara, CA)
    …to create an environment where we all win with precision. **Your Career** As a Design engineer on the ASIC team, you will create complex digital logic for our ... Ensure that designs meet aggressive goals for area, timing, power , and testability in close collaboration with ASIC... power , and testability in close collaboration with ASIC physical design engineers + Perform synthesis + Optimize… more
    Palo Alto Networks (03/19/25)
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  • Senior ASIC Design Engineer

    Tarana Wireless (Milpitas, CA)
    This position will challenge you! The Senior ASIC Engineer will work on complex ASIC designs for our point to multipoint wireless products. + ... circuits using Verilog + Frontend design development and integration of large ASIC designs including: Integration of Processors, Bus, Memory, and Interface IPs +… more
    Tarana Wireless (05/01/25)
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  • Senior ASIC Design Verification…

    Cisco (San Jose, CA)
    …Who You'll Work With You will work with outstanding talent and vast ASIC development expertise in design, DV, DFT, physical design, and post-silicon validation The ... a system company, so you can also use the ASIC to work with the System and Software teams...as a team, to develop innovative technology, and to power a more inclusive, digital future for everyone. How… more
    Cisco (03/05/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking an outstanding Senior ASIC Design Engineer to design and implement the world's leading SoC's and GPU's. This position offers the ... and Digital Systems design. + A deep understanding of ASIC design flow including RTL design, verification, logic synthesis,...the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear… more
    NVIDIA (05/02/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer . NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This ... team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications. + Analyze architectural… more
    NVIDIA (03/12/25)
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  • Senior ASIC Design Engineer

    Cisco (San Jose, CA)
    …provider networks. Cisco's silicon team provides an outstanding, unique experience for ASIC engineers by combining the resources offered by a sizable multi-geography ... breadth of growth opportunities that working in a smaller ASIC team can provide. Your Impact * Write micro-architecture...* Implement Verilog RTL to meet timing, performance, and power requirements. * Contribute to full chip integration and… more
    Cisco (05/02/25)
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  • Senior ASIC Design Engineer

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll join a group of hardworking engineers ... need to see: + BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required, advanced degrees (MS, PhD) a plus. + 5+ years… more
    NVIDIA (04/05/25)
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  • Sr. SOC/ ASIC Physical Design…

    SpaceX (Sunnyvale, CA)
    Sr. SOC/ ASIC Physical Design Engineer (Silicon Engineering) Sunnyvale, CA Apply SpaceX was founded under the belief that a future where humanity is out exploring ... ultimate goal of enabling human life on Mars. SR. SOC/ ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING) At...as needed COMPENSATION AND BENEFITS: Pay range: Physical Design Engineer / Senior : $170,000.00 - $230,000.00/per year Your actual… more
    SpaceX (04/15/25)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team ... reset logic to various units in SOC and GPU ASIC . The complexity of the clocks and resets design...verification to deliver a bug free clocks design to power our product lines ranging from Data Centers, Consumer… more
    NVIDIA (03/25/25)
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  • Senior ASIC Verification…

    NVIDIA (Santa Clara, CA)
    NVIDIA is seeking outstanding Senior Design Verification Engineers with a specialty in tools and automation to drive efficiency and collaboration among our High ... of relevant industry experience + Exposure to computer architecture, ASIC design, and verification methodology is required + Experience...the challenge of crafting the highest performance & lowest power silicon possible? If so, we want to hear… more
    NVIDIA (03/27/25)
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  • Senior ASIC Physical Design…

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If ... closure of high-performance designs with a focus on improving PPA (Performance, Power , Area). + Good understanding of hardware architecture and RTL/logic design for… more
    NVIDIA (04/09/25)
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  • Senior ASIC Timing Engineer

    NVIDIA (Santa Clara, CA)
    …work, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want ... up with timing closure strategy, creating timing constraints, driving timing and power convergence, as well as ECO implementation + Apply knowledge and experience… more
    NVIDIA (03/18/25)
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  • Senior ASIC Design Verification…

    Google (Sunnyvale, CA)
    …ASICs. + Experience in memory subsystem design verification. + Experience in Power aware verification, Gate level simulations, and Post silicon bring-up. + ... Familiarity with ASIC standard interfaces and memory system architecture. In this...team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to… more
    Google (04/25/25)
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  • Senior High-Performance ASIC Timing…

    NVIDIA (Santa Clara, CA)
    …and timing methodologies. + Finding the right tradeoffs and balance between power /area/congestions/etc. What we need to see: + BS (or equivalent experience) in ... 5+ years' experience or MS (or equivalent experience) with 3+ years' experience in ASIC Design and Timing + Hands-on experience in STA tools, ECO implementation, and… more
    NVIDIA (03/25/25)
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  • ASIC Design Engineer , Cloud-Scale…

    Amazon (Cupertino, CA)
    …to Global 500 companies trust our robust suite of products and services to power their businesses. Diverse Experiences AWS values diverse experiences. Even if you do ... scale and rapid integration of emergent technologies. We're looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while… more
    Amazon (04/23/25)
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  • Senior Power Architecture…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Power Architecture and Optimization Engineer ! NVIDIA prides ourselves in having energy efficient products. We believe that ... success. Our team is responsible for analyzing fullchip and unit-level power data, and driving ASIC teams to improve their units' power efficiency; and… more
    NVIDIA (03/18/25)
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  • Senior Emulation Power

    NVIDIA (Santa Clara, CA)
    We are looking for a Senior Emulation Power Engineer ! NVIDIA prides in having energy efficient products. We believe that continuing to maintain our products' ... success. Our team is responsible for analyzing fullchip and unit-level power data and driving ASIC teams to improve their units' power efficiency; and… more
    NVIDIA (02/13/25)
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  • Sr. Staff Design Engineer (Low Power

    Qualcomm (Santa Clara, CA)
    …IP based full chip debug is preferred. + 7+ yrs. of working experience in ASIC Design + Low power micro-architecture, Design, Power Intent/Implementation, ... at least one product cycle is preferred **Keywords** : ASIC ; SOC; Low Power ; Power ...influence over key organizational decisions (eg, is consulted by senior leadership to make key decisions). * Tasks do… more
    Qualcomm (04/09/25)
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  • Senior Signal and Power Integrity…

    NVIDIA (Santa Clara, CA)
    We are now looking for a Senior Signal & Power Integrity Engineer ! NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in ... be doing: + Work on crafting creative Signal and Power Integrity solutions to complex system design problems. +...in a dynamic cross-functional role to optimize package, PCB, ASIC , mixed signal circuit. What we need to see:… more
    NVIDIA (04/24/25)
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