We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- …Make the choice to join us today. NVIDIA's DFX team is looking for an exceptional DFT Engineer to help shape the future of compute. As stewards of the entire ... teams to drive scalable, automated solutions. + Co-architect novel DFT strategies alongside VLSI and Product Engineering teams to...field + 5+ years of hands-on experience in Design-For-Test ( DFT ) + Deep knowledge of DFT tools,… more
- NVIDIA (Santa Clara, CA)
- …experience) with 5+, MSEE with 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of fundamental DFT topics, such ... of MBIST and IOBIST fundamentals. + Experience in architecting DFT access mechanisms in 3D stacked and dielet/chiplet based...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... semiconductor chips. What you'll be doing: + As a senior engineering member on our team, you will work...+ In addition, you will help develop and deploy DFT methodologies for our next generation products while also… more
- NVIDIA (Santa Clara, CA)
- …We need a creative individual who understand ASIC and SoC test methodology, DFT techniques, NPI and ATE test program development and release. The individual will ... time, speed up the NPI bringup process. the individual will work with our DFT team, test engineering team and product developing engineering team to bringup our… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If ... frequency and power/area/congestions/yield/etc. + Work on all aspects of DFT /Test timing such as timing constraints, timing analysis, timing...to stand out from the crowd: + Experience with DFT timing closure for various modes eg scan shift,… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- …design tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If ... You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level...power/area optimization across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing… more
- Palo Alto Networks (Santa Clara, CA)
- …for the manufacturing capabilities to build our next-generation network firewalls. As a senior test engineer , you will be responsible for building advanced test ... for test coverage and serviceability with ICT and boundary scan + Drive DfT (Design for Testability) and test coverage analyses from early Prototype design stages… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Engineer in the area of DFX ATPG flows and methodologies. Do you like to think creatively and enjoy solving challenges that ... be doing: + Support the deployment of advanced Design-For-Test ( DFT ) and Automatic Test Pattern Generation (ATPG) solutions +...to stand out from the crowd: + Knowledge of DFT including fault models, ATPG, fault simulation, and diagnosis… more
- NVIDIA (Santa Clara, CA)
- …lines many thousands of times per day. We are seeking a CAD R&D Engineer excited to innovate in algorithms related to ECO automation, including mapping, patch size ... minimization, reconfiguration of clocks, power, and DFT , as well as incremental timing and power optimization....place & route. Previous experience as a physical design engineer would be ideal. + Proficiency in C++ +… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... GPUs or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan shift and… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... such as GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing closure for various modes eg, scan, BIST, etc. +… more
- Applied Materials (Santa Clara, CA)
- …Product Life Cycle (PLC) process by defining Design For Transportability ( DFT ) requirements and influencing product design. Identify and execute continuous ... Materials and its Supply Base. Provide advanced training and support to Packaging Engineer III. Performs other duties as assigned. Duties will vary according to the… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Software Engineer - Design-For-Test. Do you like to think creatively and enjoy solving challenges that require innovation? If so, ... agility + Experience with software and hardware especially involving DFT , failure analysis, and CAD tools + Working experience...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior Logic Design Engineer ! As a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and ... of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT , timing analysis, floor-planning, ECO, bring-up & lab debug. + Strong… more
- NVIDIA (Santa Clara, CA)
- The NVIDIA Clocks Team is looking for an excellent Senior ASIC Verification engineer with extensive experience in Design Verification. The NVIDIA Clocks Team is ... experience in implementing Test plans for pre-silicon platforms. + Understanding of DFT /IST is optional. We have some of the most forward-thinking and hardworking… more
- NVIDIA (Santa Clara, CA)
- …deliver extraordinary solutions in a wide range of sectors. We are seeking post-silicon Senior System Level Product Engineer who is passionate and committed to ... Excellent problem solving, collaborative, and interpersonal skills. + Knowledgeable in DFT architecture, BIST, fault models and fault detection methods, HTOL… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a motivated Senior Circuit Design Engineer to join our dynamic and growing team. If you are looking for a challenging and exciting role in ... synthesis and verification, knowledge of Place and Route, and understanding of Design-for-test ( DFT ) is a plus. + Proficiency in scripting language, such as, Perl,… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you want to challenge ... + Understanding of high-speed clock distribution and planning as well as impact of DFT logic in timing convergence. + Knowledge of circuits and SPICE, as well as… more
- NVIDIA (Santa Clara, CA)
- …and Iread + Product Guidance: Collaborate with architecture, RTL, place & route, DFT , CAD, circuit design, yield operations, and even external foundries to provide ... our exclusive engineering teams are rapidly growing. If you are a creative and autonomous engineer with a real passion for technology, we want to hear from you. Make… more