We interpreted Mountain View, CA as Mountain View, CA. Other options include: Mountain View (Contra Costa County), CA
- NVIDIA (Santa Clara, CA)
- …imagination and intelligence. Make the choice to join us today. DFX Methodology Group at NVIDIA works on groundbreaking innovations involving crafting creative ... 3+, or PhD with 2+ years of experience in DFT , system architecture, or RTL design. + Understanding of...are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to… more
- NVIDIA (Santa Clara, CA)
- …NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the ... semiconductor chips. What you'll be doing: + As a senior engineering member on our team, you will work...+ In addition, you will help develop and deploy DFT methodologies for our next generation products while also… more
- NVIDIA (Santa Clara, CA)
- …on the world. We need a creative individual who understand ASIC and SoC test methodology , DFT techniques, NPI and ATE test program development and release. The ... individual will turn the test methodology into ATE test method library. efficient and user...NPI bringup process. the individual will work with our DFT team, test engineering team and product developing engineering… more
- NVIDIA (Santa Clara, CA)
- …tradeoffs and methodology on next generation CMOS technology. We are looking for a Senior ASIC Timing Engineer to join our dynamic and growing team! If you ... BIST, etc. + Knowledge of clocking and clock controls in DFT modes. + Experience in methodology or flow development. NVIDIA is widely considered to be one… more
- NVIDIA (Santa Clara, CA)
- We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked ... NVIDIA works on groundbreaking innovations involving crafting creative solutions for DFT architecture, verification and post-silicon validation on some of the… more
- NVIDIA (Santa Clara, CA)
- …and methodology on next generation CMOS technology. We are looking for a Senior ASIC Synthesis Engineer to join our dynamic and growing team! If you ... You'll Be doing: + As a Front-End ASIC Synthesis Engineer , you will own RTL synthesis and gate level...power/area optimization across multiple design blocks + Work with DFT and Verification teams to ensure functional and timing… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS...or Network processor implementation or SOCs. + Understanding of DFT logic and experience with DFT timing… more
- NVIDIA (Santa Clara, CA)
- …human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic and growing team. If you want to challenge yourself ... experience to improve timing convergence flows working with the methodology teams. What we need to see: + BS...GPUs, CPUs, DPUs/Network processors, or SOCs + Understanding of DFT logic and experience with DFT timing… more
- NVIDIA (Santa Clara, CA)
- …inventiveness and intelligence. We are now looking for a motivated ASIC Physical Design Engineer to join our dynamic and growing team. If you want to challenge ... clock distribution and planning as well as impact of DFT logic in timing convergence. + Knowledge of circuits...of circuits and SPICE, as well as experience in methodology and/or flow development and automation. NVIDIA is widely… more
- NVIDIA (Santa Clara, CA)
- …and intelligence. Be part of a diverse team creating NVIDIA's chip design methodology ! We're responsible for the Front-End Design Implementation methodology for ... Learning + Experience in other ASIC methodologies such as RTL Lint, CDC, DFT or STA. + Experience with compute farm interaction: software deployment, performance… more
- NVIDIA (Santa Clara, CA)
- …plus. + Experience as a Silicon Bringup Lead focussed on In system level DFT features. + Experience in succeeding in a highly matrix organization. + Driven process/ ... methodology improvements. NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing, and Visualization. The GPU,… more
- Cisco (San Jose, CA)
- …meet timing and performance requirements. + Help define, evolve, and support our design methodology . + Collaborate with the verification, PD, DFT , Package and SW ... ASIC Design Engineer Apply (https://jobs.cisco.com/jobs/Login?projectId=1441220) + Location:San Jose, California, US + Area of InterestEngineer - Hardware +… more